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| 型号： | LTC3600IDD#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 15/28页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 1.5A 12DFN |
| 特色产品： | LTC3600 Step-Down Regulator |
| 标准包装： | 121 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0 V ~ 14.5 V |
| 输入电压： | 4 V ~ 15 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1MHz |
| 电流 - 输出： | 1.5A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 12-WFDFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 12-DFN（3x3） |
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LTC3600
APPLICATIONS INFORMATION
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
% Efficiency = 100% – (L1 + L2 + L3 + …)
where L1, L2, etc., are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3600 circuits: 1) I 2 R losses, 2) transition
losses, 3) switching losses, 4) other losses.
1. I 2 R losses are calculated from the DC resistances of
the internal switches, R SW , the external inductor, R L ,
and board trace resistance, R b . In continuous mode, the
average output current flows through inductor L but is
“chopped” between the internal top and bottom power
MOSFETs. Thus, the series resistance looking into the
SW pin is a function of both top and bottom MOSFET
R DS(ON) and the duty cycle (D) as follows:
R SW = (R DS(ON)TOP )(D) + (R DS(ON)BOT )(1-D)
The R DS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I 2 R losses:
I 2 R losses = I OUT2 (R SW + R L + R b )
2. Transition loss arises from the brief amount of time
the top power MOSFET spends in the saturated region
during switch node transitions. It depends upon the
input voltage, load current, internal power MOSFET
gate capacitance, internal driver strength, and switch-
ing frequency.
3. The INTV CC current is the sum of the power MOSFET
driver and control currents. The power MOSFET driver
current results from switching the gate capacitance of
the power MOSFETs. Each time a power MOSFET gate
is switched from low to high to low again, a packet of
charge dQ moves from V IN to ground. The resulting
dQ/dt is a current out of INTV CC that is typically much
larger than the DC control bias current. In continuous
mode, I GATECHG = f SW (QT + QB), where QT and QB are
the gate charges of the internal top and bottom power
MOSFETs and f SW is the switching frequency. Since
INTV CC is a low dropout regulator output powered by
V IN , the INTV CC current also shows up as V IN current,
unless a separate voltage supply (>5V and <6V) is used
to drive INTV CC .
4. Other “hidden” losses such as copper trace and internal
load resistances can account for additional efficiency
degradations in the overall power system. It is very
important to include these system level losses in the
design of a system. Other losses including diode conduc-
tion losses during dead-time and inductor core losses
generally account for less than 2% total additional loss.
Thermal Considerations
In a majority of applications, the LTC3600 does not dis-
sipate much heat due to its high efficiency and low thermal
resistance of its exposed pad DFN or MSOP package. How-
ever, in applications where the LTC3600 is running at high
ambient temperature, high V IN , high switching frequency
and maximum output current load, the heat dissipated may
exceed the maximum junction temperature of the part. If
the junction temperature reaches approximately 160°C,
both power switches will be turned off until temperature
is about 15°C cooler.
To avoid the LTC3600 from exceeding the maximum junc-
tion temperature, the user will need to do some thermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum junction
temperature of the part. The temperature rise is given by:
T RISE = P D ? θ JA
3600fc
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