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| 型号： | LTC3601IUD#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 13/26页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 1.5A 16QFN |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.5 V ~ 14.52 V |
| 输入电压： | 4 V ~ 15 V |
| PWM 型： | 电流模式，混合 |
| 频率 - 开关： | 800kHz ~ 4MHz |
| 电流 - 输出： | 1.5A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-QFN-EP（3x3） |
LTC3601
APPLICATIONS INFORMATION
Minimum Off-Time/On-Time Considerations
The minimum off-time is the smallest amount of time that
the LTC3601 can turn on the bottom power MOSFET, trip
the current comparator and turn the power MOSFET back
off. This time is typically 40ns. For the controlled on-time
current mode control architecture, the minimum off-time
limit imposes a maximum duty cycle of:
DC (MAX) = 1 – ( f ? t OFF(MIN) )
where f is the switching frequency and t OFF(MIN) is the
minimum off-time. If the maximum duty cycle is surpassed,
due to a dropping input voltage for example, the output
will drop out of regulation. The minimum input voltage to
avoid this dropout condition is:
importance in most cases, and high switching frequen-
cies may be used in the design without any fear of severe
consequences. As the sections on Inductor and Capacitor
Selection show, high switching frequencies allow the use
of smaller board components, thus reducing the footprint
of the application circuit.
Internal/External Loop Compensation
The LTC3601 provides the option to use a ?xed internal
loop compensation network to reduce both the required
external component count and design time. The internal
loop compensation network can be selected by connect-
ing the ITH pin to the INTV CC pin. To ensure stability, it
is recommended that the output capacitance be at least
47μF when using internal compensation. Alternatively,
V IN(MIN) =
1 ? ( f ? t OFF(MIN)
V OUT
)
the user may choose speci?c external loop compensation
components to optimize the main control loop transient
response as desired. External loop compensation is chosen
Conversely, the minimum on-time is the smallest dura-
tion of time in which the top power MOSFET can be in
its “on” state. This time is typically 20ns. In continuous
mode operation, the minimum on-time limit imposes a
minimum duty cycle of:
DC (MIN) = ( f ? t ON(MIN) )
where t ON(MIN) is the minimum on-time. As the equation
shows, reducing the operating frequency will alleviate the
minimum duty cycle constraint.
In the rare cases where the minimum duty cycle is
surpassed, the output voltage will still remain in regula-
tion, but the switching frequency will decrease from its
programmed value. This is an acceptable result in many
by simply connecting the desired network to the ITH pin.
Suggested compensation component values are shown in
Figure 3. For a 2MHz application, an R-C network of 220pF
and 13kΩ provides a good starting point. The bandwidth
of the loop increases with decreasing C. If R is increased
by the same factor that C is decreased, the zero frequency
will be kept the same, thereby keeping the phase the same
in the most critical frequency range of the feedback loop.
A 10pF bypass capacitor on the ITH pin is recommended
for the purposes of ?ltering out high frequency coupling
from stray board capacitance. In addition, a feedforward
capacitor C F can be added to improve the high frequency
response, as previously shown in Figure 2. Capacitor C F
provides phase lead by creating a high frequency zero
with R1 which improves the phase margin.
applications, so this constraint may not be of critical
ITH
R COMP
LTC3601
13k
C COMP
220pF
C BYP
SGND
3601 F03
Figure 3. Compensation Components
3601fb
13
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