参数资料
型号: LTC3610EWP#PBF
厂商: Linear Technology
文件页数: 12/24页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 12A 64QFN
标准包装: 40
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 24 V
输入电压: 4 V ~ 24 V
PWM 型: 电流模式
电流 - 输出: 12A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 64-VFQFN 裸露焊盘
包装: 管件
供应商设备封装: 64-QFN(9x9)
产品目录页面: 1335 (CN2011-ZH PDF)
LTC3610
APPLICATIONS INFORMATION
V OUT
R VON1
30k
R VON2
100k
R C
C C
(2a)
C VON
0.01μF
V ON
LTC3610
I TH
frequency with small ripple current. However, achieving
this requires a large inductor. There is a trade-off between
component size, efficiency and operating frequency.
A reasonable starting point is to choose a ripple current
that is about 40% of I OUT(MAX) . The largest ripple current
occurs at the highest V IN . To guarantee that ripple current
does not exceed a specified maximum, the inductance
should be chosen according to:
10k
LTC3610
R C
I TH
V OUT ?
V OUT
? f Δ I L(MAX) ? ?
V IN(MAX) ?
R VON1
3k
V OUT V ON
R VON2 C VON
10k 0.01μF
INTV CC
Q1
2N5087
C C 3610 F02
(2b)
Figure 2. Correcting Frequency Shift with Load Current Changes
2.0
? ? ?
L = ? ? ? 1 ? ?
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores.
A variety of inductors designed for high current, low volt-
age applications are available from manufacturers such as
Sumida, Panasonic, Coiltronics, Coilcraft and Toko.
C IN  and C OUT  Selection
1.5
DROPOUT
REGION
The input capacitance C IN is required to filter the square
wave current at the drain of the top MOSFET. Use a low ESR
capacitor sized to handle the maximum RMS current.
1.0
0.5
I RMS ? I OUT(MAX)
V OUT
V IN
V IN
V OUT
–1
DUTY CYCLE (V OUT /V IN )
Δ I L = ? OUT ? ? 1 ? OUT ?
Δ V OUT ≤ Δ I L ? ESR +
0
0 0.25 0.50 0.75 1.0
3610 F03
Figure 3. Maximum Switching Frequency vs Duty Cycle
Inductor Selection
Given the desired input and output voltages, the induc-
tor value and operating frequency determine the ripple
current:
? V ? ? V ?
? f L ? ? V IN ?
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Highest efficiency operation is obtained at low
This formula has a maximum at V IN = 2V OUT , where
I RMS = I OUT(MAX) /2. This simple worst-case condition is
commonly used for design because even significant de-
viations do not offer much relief. Note that ripple current
ratings from capacitor manufacturers are often based on
only 2000 hours of life which makes it advisable to derate
the capacitor.
The selection of C OUT is primarily determined by the
ESR required to minimize voltage ripple and load step
transients. The output ripple Δ V OUT is approximately
bounded by:
? 1 ?
?
? 8fC OUT ?
3610ff
  
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