参数资料
型号: LTC3620EDC-1#TRPBF
厂商: Linear Technology
文件页数: 3/18页
文件大小: 0K
描述: IC REG BUCK SYNC 1.1V 15MA 8DFN
标准包装: 2,500
类型: 降压(降压)
输出类型: 固定
输出数: 1
输出电压: 1.1V
输入电压: 2.9 V ~ 5.5 V
频率 - 开关: 50kHz
电流 - 输出: 15mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-WFDFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 8-DFN(2x2)

LTC3620
ELECTRICAL CHARACTERISTICS The l denotes the speci?cations which apply over the full operating
junction temperature range, otherwise speci?cations are for T A = 25°C (Note 2). V IN = 3.6V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V FMIN
FMIN/MODE Input Voltage High
FMIN/MODE Input Voltage Low
0.9
0.7
V
V
f EXT
I FMIN/MODE
FMIN/MODE Input Frequency
FMIN/MODE Pin Leakage Current
20
±0.01
300
±1
kHz
μA
I SW
I FB
Switch Leakage Current
V FB Pin Current
V RUN = 0V, V SW = 0V or 5.5V, V IN = 5.5V
LTC3620, V FB = 0.6V
LTC3620-1, V FB = 1.1V
±0.01
0
1.2
±1
±30
2.0
μA
nA
μA
V UVLO
V LOBATB
Undervoltage Lockout (UVLO)
LOBATB Threshold Voltage
V IN Decreasing
V IN Decreasing
2.7
2.93
2.8
3.0
2.9
3.08
V
V
R LOBATB
V HLOBATB
LOBATB Pull-Down On-Resistance
LOBATB Hysteresis Voltage
15
100
Ω
mV
R PFET
R NFET
R DS(ON) of P-channel FET (Note 4)
R DS(ON) of N-channel FET (Note 4)
I SW = 50mA, V IN = 3.6V
I SW = –50mA, V IN = 3.6V
2.0
1.0
Ω
Ω
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3620 is tested under pulsed load conditions such that T J ≈ T A .
LTC3620E is guaranteed to meet speci?cations from 0°C to 85°C
junction temperature. Speci?cations over the –40°C to 85°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. Note that the maximum
ambient temperature consistent with these speci?cations is determined by
package thermal impedance and other environmental factors. The junction
temperature (T J , in °C) is calculated from the ambient temperature (T A , in °C)
and power dissipation (P D , in Watts) according to the formula:
T J = T A + (P D ? θ JA ), where θ JA (in °C/W) is the package thermal
impedance.
Note 3: The LTC3620 is tested in a proprietary test mode that connects V FB
to the output of the error ampli?er.
Note 4: The DFN switch-on resistance is guaranteed by correlation to
wafer level measurements.
speci?c operating conditions in conjunction with board layout, the rated
3620fa
3
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