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参数资料
| 型号： | LTC3634IUFD#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 稳压器 |
| 英文描述： | 5.5 A DUAL SWITCHING CONTROLLER, 4600 kHz SWITCHING FREQ-MAX, PQCC28 |
| 封装： | 4 X 5 MM, LEAD FREE, PLASTIC, MO-220, QFN-28 |
| 文件页数： | 11/28页 |
| 文件大小： | 359K |
| 代理商： | LTC3634IUFD#PBF |
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LTC3634
19
3634f
A default internal soft-start ramp forces a minimum soft-
start time of 400μs by overriding the TRACKSS pin input
during this time period. Hence, capacitance values less
than approximately 1000pF will not significantly affect
soft-start behavior.
Start-Up Behavior
Upon start-up, both channels immediately default to
discontinuous operation. Channel 1 will remain in dis-
continuous Burst Mode operation until its output rises to
greater than 80% of its final value (VFB > 480mV). Once
the output exceeds this voltage, the operating mode of
the regulator switches to the mode selected by the MODE/
SYNC pin as described above. During normal operation,
if the output drops below 10% of its final value (as it may
when tracking down, for instance), the regulator will
automatically switch to Burst Mode operation to prevent
inductor saturation and improve TRACKSS pin accuracy.
Channel 2 (the VTT termination supply) remains in discon-
tinuous operation until its output rises above 300mV, at
which point it will automatically switch to forced continu-
ous operation. This ensures that the regulator output has
applicaTions inForMaTion
sufficient voltage to discharge the inductor in continuous
mode and prevent excessive build-up of energy in the
inductor.
Output Power Good
The PGOOD output of the LTC3634 is driven by a 15Ω
(typical) open-drain pull-down device. If the output volt-
age exits an 8% (typical) regulation window around the
targetregulationpoint,theopen-drainoutputwillpulldown
with 15Ω output resistance to ground, thus dropping the
PGOOD pin voltage. This pull-down device will not shut
off until the output re-enters this window and overcomes
a small amount of hysteresis. This behavior is described
in Figure 6.
A filter time of 40μs (typical) acts to prevent unwanted
PGOOD output changes during VOUT transient events. As
a result, the output voltage must exit the 8% regulation
window for 40μs before the PGOOD pin pulls to ground.
Conversely, the output voltage must be within the target
regulation window for 40μs before the PGOOD pin pulls
high.
Figure 6. PGOOD Pin Behavior
VHYS
VHYS(CH1): 2.5%
VHYS(CH2):
100%
3634 F06
OUTPUT VOLTAGE
PGOOD
VOLTAGE
0%
15mV
VTTR
–8%
NOMINAL OUTPUT
8%
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相关代理商/技术参数 |
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|---|---|
| LTC3634MPFE#PBF | 制造商:Linear Technology 功能描述:IC CONV DDR DDR2 DDR3 28TSSOP 制造商:Linear Technology 功能描述:BUCK 15V 3A 500KHZ-4MHZ TS 制造商:Linear Technology 功能描述:BUCK, 15V, 3A, 500KHZ-4MHZ, TSSOP-28 制造商:Linear Technology 功能描述:DP-SWREG/Monolithic, 15V Dual 3A Monolithic Step Down Regulator for DDR Power |
| LTC3634MPFE#TRPBF | 制造商:Linear Technology 功能描述:IC REG 15V 3A STEP DOWN 28-TSSOP 制造商:Linear Technology 功能描述:DC-DC REGULATOR, BUCK, ADJ, TSSOP-28, Primary Input Voltage:15V, No. of Outputs:2, Output Current:3A, No. of Pins:28, Operating Temperature Min:-55C, Operating Temperature Max:150C, MSL:-, Package / Case:28-TSSOP , RoHS Compliant: Yes |
| LTC3634MPUFD#PBF | 制造商:Linear Technology 功能描述:IC CONV DDR DDR2 DDR3 28-QFN 制造商:Linear Technology 功能描述:BUCK 15V 3A 500KHZ-4MHZ QF |
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| LTC3637EMSE#PBF | 制造商:Linear Technology 功能描述:IC REG BUCK SYNC ADJ 1A 16MSOP |
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