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| 型号： | LTC3642IDD-3.3#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 14/22页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC 3.3V 50MA 8DFN |
| 标准包装： | 121 |
| 类型： | 降压（降压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 3.3V |
| 输入电压： | 4.5 V ~ 45 V |
| PWM 型： | Burst Mode? |
| 电流 - 输出： | 50mA |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-WFDFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 8-DFN-EP（3x3） |
LTC3642
APPLICATIONS INFORMATION
V IN(MAX) ? ?
? < 6V
t SS(ISET) = C ISET ?
t SS = C SS ?
Theminimumvalueofthesethresholdsislimitedtothe
internal V IN UVLO thresholds that are shown in the Electri-
cal Characteristics table. The current that flows through
this divider will directly add to the shutdown, sleep and
active current of the LTC3642, and care should be taken to
minimize the impact of this current on the overall efficiency
of the application circuit. Resistor values in the megohm
range may be required to keep the impact on quiescent
shutdown and sleep currents low. Be aware that the HYST
pin cannot be allowed to exceed its absolute maximum
rating of 6V. To keep the voltage on the HYST pin from
exceeding 6V, the following relation should be satisfied:
? R3 ?
? R1 + R2 + R3 ?
The RUN pin may also be directly tied to the V IN supply
for applications that do not require the programmable
undervoltage lockout feature. In this configuration, switch-
ing is enabled when V IN surpasses the internal undervoltage
lockout threshold.
Soft-Start
The internal 0.75ms soft-start is implemented by ramping
both the effective reference voltage from 0V to 0.8V and the
peak current limit set by the I SET pin (25mA to 115mA).
To increase the duration of the reference voltage soft-start,
place a capacitor from the SS pin to ground. An internal
5μA pull-up current will charge this capacitor, resulting
in a soft-start ramp time given by:
0.8V
5μA
When the LTC3642 detects a fault condition (input supply
undervoltage or overvoltage) or when the RUN pin falls
below 1.1V, the SS pin is quickly pulled to ground and the
internal soft-start timer is reset. This ensures an orderly
restart when using an external soft-start capacitor.
The duration of the 1ms internal peak current soft-start
may be increased by placing a capacitor from the I SET pin
to ground. The peak current soft-start will ramp from 25mA
to the final peak current value determined by a resistor
from I SET to ground. A 1μA current is sourced out of the
I SET pin. With only a capacitor connected between I SET
and ground, the peak current ramps linearly from 25mA
to 115mA, and the peak current soft-start time can be
expressed as:
0.8V
1μA
A linear ramp of peak current appears as a quadratic
waveform on the output voltage. For the case where the
peak current is reduced by placing a resistor from I SET
to ground, the peak current offset ramps as a decaying
exponential with a time constant of R ISET ? C ISET . For this
case, the peak current soft-start time is approximately
3 ? R ISET ? C ISET .
Unlike the SS pin, the I SET pin does not get pulled to
ground during an abnormal event; however, if the I SET
pin is floating (programmed to 115mA peak current),
the SS and I SET pins may be tied together and connected
to a capacitor to ground. For this special case, both the
peak current and the reference voltage will soft-start on
power-up and after fault conditions. The ramp time for
this combination is C SS(ISET) ? (0.8V/6μA).
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
the losses: V IN operating current and I 2 R losses. The V IN
operating current dominates the efficiency loss at very
low load currents whereas the I 2 R loss dominates the
efficiency loss at medium to high load currents.
1. The V IN operating current comprises two components:
The DC supply current as given in the electrical charac-
teristics and the internal MOSFET gate charge currents.
3642fc
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