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参数资料
| 型号： | LTC3785EUF-1#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 8/20页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BST PWM VM 24-QFN |
| 标准包装： | 2,500 |
| PWM 型： | 电压模式 |
| 输出数： | 2 |
| 频率 - 最大： | 1MHz |
| 占空比： | 99% |
| 电源电压： | 2.7 V ~ 10 V |
| 降压： | 是 |
| 升压： | 是 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 24-WFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
LTC3785-1
OPERATION
MAIN CONTROL LOOP
V IN
V OUT
The LTC3785-1 is a buck-boost voltage mode controller
that provides an output voltage above, equal to or below
the input voltage.
TG1
A
SW1
L
SW2
D
TG2
The LTC proprietary topology and control architecture also
BG1
B
C
BG2
employs drain-to-source sensing (No R SENSE ) for forward
and reverse current limiting. The controller provides
all N-channel MOSFET output switch drive, facilitating
single package multiple power switch technology along
37851 F01
Figure 1. Response Time Test Circuit
with lower R DS(ON) . The error amp output voltage (V C )
determines the output duty cycle of the switches. Since
the V C pin is a ?ltered signal, it provides rejection of high
frequency noise.
The FB pin receives the voltage feedback signal, which
is compared to the internal reference voltage by the er-
ror ampli?er. The top MOSFET drivers are biased from a
?oating bootstrap capacitor, which is normally recharged
90%
D MAX
BOOST
D MIN
BOOST
D MAX
BUCK
D MIN
BUCK
A ON, B OFF
PWM C, D SWITCHES
FOUR SWITCH PWM
D ON, C OFF
PWM A, B SWITCHES
BOOST REGION
BUCK/BOOST REGION
BUCK REGION
37851 F02
during each off cycle through an external diode when the
top MOSFET turns off. Optional Schottky diodes can be
connected across synchronous switch B and D to provide
a lower drop during the dead time and eliminate ef?ciency
loss due to body diode reverse recovery.
The main control loop is shut down by pulling the RUN/
SS pin low. An internal 1μA current source charges the
RUN/SS pin and when the pin voltage is higher than 0.7V
the IC is enabled. The V C voltage is then clamped to the
RUN/SS voltage minus 0.7V while C SS is slowly charged
during start-up. This soft-start clamping prevents inrush
current draw from the input power supply.
POWER SWITCH CONTROL
Figure 1 shows a simpli?ed diagram of how the four power
switches are connected to the inductor, V IN , V OUT and GND.
Figure 2 shows the regions of operation for the LTC3785-1
as a function of duty cycle D. The power switches are
properly controlled so that the transfer between modes
is continuous.
Buck Region (V IN > V OUT )
Switch D is always on and switch C is always off during
buck mode. When the error amp output voltage, V C , is
approximately above 0.1V, output A begins to switch. During
Figure 1. Response Time Test Circuit
the off time of switch A, synchronous switch B turns on for
the remainder of the switching period. Switches A and B will
alternate similar to a typical synchronous buck regulator.
As the control voltage increases, the duty cycle of switch
A increases until the max duty cycle of the converter in
buck mode reaches D MAX_BUCK , given by:
D MAX_BUCK = 100 – D4(SW)%
where D4(SW) = duty cycle % of the four switch range.
D4(SW) = (300ns ? f) ? 100%
where f = operating frequency, Hz.
Beyond this point the four switch or buck-boost region
is reached.
Buck-Boost or Four Switch (V IN ~ V OUT )
When the error amp output voltage, V C , is above ap-
proximately 0.65V, switch pair AD remain on for duty
cycle D MAX_BUCK , and the switch pair AC begin to phase
in. As switch pair AC phases in, switch pair BD phases
out accordingly. When the V C voltage reaches the edge of
the buck-boost range, approximately 0.7V, the AC switch
pair completely phase out the BD pair, and the boost phase
begins at duty cycle, D4(SW).
37851fa
8
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