参数资料
型号: LTC3788IUH#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: DUAL SWITCHING CONTROLLER, 900 kHz SWITCHING FREQ-MAX, PQCC32
封装: 5 X 5 MM, LEAD FREE, PLASTIC, MO-220WHHD, QFN-32
文件页数: 14/32页
文件大小: 386K
代理商: LTC3788IUH#PBF
LTC3788
21
3788fb
applicaTions inForMaTion
Each of the topside MOSFET drivers includes an internal
charge pump that delivers current to the bootstrap capaci-
tor from the BOOST pin. This charge current maintains
the bias voltage required to keep the top MOSFET on
continuously during dropout/overvoltage conditions. The
Schottky/silicon diodes selected for the topside drivers
shouldhaveareverseleakagelessthantheavailableoutput
current the charge pump can supply. Curves displaying
the available charge pump current under different operat-
ing conditions can be found in the Typical Performance
Characteristics section.
A leaky diode DB in the boost converter can not only
prevent the top MOSFET from fully turning on but it can
also completely discharge the bootstrap capacitor CB and
create a current path from the input voltage to the BOOST
pin to INTVCC. This can cause INTVCC to rise if the diode
leakage exceeds the current consumption on INTVCC.
This is particularly a concern in Burst Mode operation
where the load on INTVCC can be very small. The external
Schottky or silicon diode should be carefully chosen such
that INTVCC never gets charged up much higher than its
normal regulation voltage.
Fault Conditions: Overtemperature Protection
At higher temperatures, or in cases where the internal
power dissipation causes excessive self heating on-chip
(such as an INTVCC short to ground), the overtemperature
shutdown circuitry will shut down the LTC3788. When the
junction temperature exceeds approximately 170°C, the
overtemperaturecircuitrydisablestheINTVCCLDO,causing
the INTVCC supply to collapse and effectively shut down
the entire LTC3788 chip. Once the junction temperature
drops back to approximately 155°C, the INTVCCLDOturns
back on. Long term overstress (TJ > 125°C) should be
avoided as it can degrade the performance or shorten
the life of the part.
Phase-Locked Loop and Frequency Synchronization
The LTC3788 has an internal phase-locked loop (PLL)
comprised of a phase frequency detector, a low pass filter
and a voltage-controlled oscillator (VCO). This allows the
turn-on of the top MOSFET of controller 1 to be locked to
the rising edge of an external clock signal applied to the
PLLIN/MODEpin.Theturn-onofcontroller2’stopMOSFET
is thus 180 degrees out-of-phase with the external clock.
The phase detector is an edge-sensitive digital type that
provides zero degrees phase shift between the external
and internal oscillators. This type of phase detector does
not exhibit false lock to harmonics of the external clock.
If the external clock frequency is greater than the internal
oscillator’sfrequency,fOSC,thencurrentissourcedcontinu-
ously from the phase detector output, pulling up the VCO
input. When the external clock frequency is less than fOSC,
current is sunk continuously, pulling down the VCO input.
If the external and internal frequencies are the same but
exhibit a phase difference, the current sources turn on for
an amount of time corresponding to the phase difference.
The voltage at the VCO input is adjusted until the phase
and frequency of the internal and external oscillators are
identical. At the stable operating point, the phase detector
output is high impedance and the internal filter capacitor,
CLP, holds the voltage at the VCO input.
Typically, the external clock (on PLLIN/MODE pin) input
highthresholdis1.6V,whiletheinputlowthresholdis1.2V.
Note that the LTC3788 can only be synchronized to an
external clock whose frequency is within range of the
LTC3788’s internal VCO, which is nominally 55kHz to
1MHz.Thisisguaranteedtobebetween75kHzand850kHz.
RapidphaselockingcanbeachievedbyusingtheFREQpin
to set a free-running frequency near the desired synchro-
nization frequency. The VCO’s input voltage is prebiased
at a frequency corresponding to the frequency set by the
FREQ pin. Once prebiased, the PLL only needs to adjust
the frequency slightly to achieve phase lock and synchro-
nization. Although it is not required that the free-running
frequency be near external clock frequency, doing so will
prevent the operating frequency from passing through a
large range of frequencies as the PLL locks.
相关PDF资料
PDF描述
LTC3788IGN-1#PBF DUAL SWITCHING CONTROLLER, 900 kHz SWITCHING FREQ-MAX, PDSO28
LTC3788EGN-1#TRPBF DUAL SWITCHING CONTROLLER, 900 kHz SWITCHING FREQ-MAX, PDSO28
LTC3789EGN#TRPBF 0.1 A SWITCHING CONTROLLER, 710 kHz SWITCHING FREQ-MAX, PDSO28
LTC3789EUFD#TRPBF 0.1 A SWITCHING CONTROLLER, 710 kHz SWITCHING FREQ-MAX, PQCC28
LTC3789EGN#PBF 0.1 A SWITCHING CONTROLLER, 710 kHz SWITCHING FREQ-MAX, PDSO28
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