参数资料
型号: LTC3789IUFD#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: 0.1 A SWITCHING CONTROLLER, 710 kHz SWITCHING FREQ-MAX, PQCC28
封装: 4 X 5 MM, LEAD FREE, PLASTIC, MO-220, QFN-28
文件页数: 9/28页
文件大小: 486K
代理商: LTC3789IUFD#PBF
LTC3789
17
3789f
applicaTions inForMaTion
clock whose frequency is within range of the LTC3789’s
internal VCO. This is guaranteed to be between 200kHz
and 600kHz. A simplified block diagram is shown in
Figure 10.
For a given ripple the inductance terms in continuous
mode are as follows:
LBOOST >
VIN(MIN)2 VOUT – VIN(MIN) 100
f IOUT(MAX) % Ripple VOUT2
H,
LBUCK >
VOUT VIN(MAX) – VOUT
(
)100
f IOUT(MAX) % Ripple VIN(MAX)
H
where:
f is operating frequency, Hz
% Ripple is allowable inductor current ripple
VIN(MIN) is minimum input voltage, V
VIN(MAX) is maximum input voltage, V
VOUT is output voltage, V
IOUT(MAX) is maximum output load current, A
For high efficiency, choose an inductor with low core loss,
such as ferrite. Also, the inductor should have low DC
resistance to reduce the I2R losses, and must be able to
handle the peak inductor current without saturating. To
minimize radiated noise, use a toroid, pot core or shielded
bobbin inductor.
CIN and COUT Selection
In the boost region, input current is continuous. In the
buck region, input current is discontinuous. In the buck
region, the selection of input capacitor CIN is driven by
the need to filter the input square wave current. Use a low
ESR capacitor sized to handle the maximum RMS current.
For buck operation, the input RMS current is given by:
IRMS ≈ IOUT(MAX)
VOUT
VIN
VIN
VOUT
– 1
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT(MAX)/2. This simple worst-case condition
is commonly used for design because even significant
deviations do not offer much relief. Note that ripple cur-
rentratingsfromcapacitormanufacturersareoftenbased
on only 2000 hours of life which makes it advisable to
derate the capacitor.
DIGITAL
PHASE/
FREQUENCY
DETECTOR
VCO
2.4V
10A
5V
RSET
3789 F10
FREQ
SYNC
EXTERNAL
OSCILLATOR
MODE/
PLLIN
Figure 10. Phase-Locked Loop Block Diagram
If the external clock frequency is greater than the inter-
nal oscillator’s frequency, fOSC, then current is sourced
continuously from the phase detector output, pulling up
the filter network. When the external clock frequency is
less than fOSC, current is sunk continuously, pulling down
the filter network. If the external and internal frequencies
are the same but exhibit a phase difference, the current
sources turn on for the amount of time corresponding to
the phase difference. The voltage on the filter network is
adjusted until the phase and frequency of the internal and
external oscillators are identical. At the stable operating
point, the phase detector output is high impedance and
the filter capacitor holds the voltage.
Typically, the external clock (on the MODE/PLLIN pin)
input high threshold is 1.6V, while the input low thresh-
old is 1V.
Inductor Selection
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. The inductor
value has a direct effect on ripple current. The inductor
current ripple IL is typically set to 20% to 40% of the
maximum inductor current in the boost region at VIN(MIN).
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