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| 型号： | LTC3808EDE#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 13/28页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 14-DFN |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 825kHz |
| 占空比： | 100% |
| 电源电压： | 2.75 V ~ 9.8 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 14-WFDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
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LTC3808
APPLICATIO S I FOR ATIO
The typical LTC3808 application circuit is shown on
Figure 11. External component selection for the controller
is driven by the load requirement and begins with the
selection of the inductor and the power MOSFETs.
Power MOSFET Selection
where I RIPPLE is the inductor peak-to-peak ripple current
(see Inductor Value Calculation).
A reasonable starting point is setting ripple current I RIPPLE
to be 40% of I OUT(MAX) . Rearranging the above equation
yields:
The LTC3808’s controller requires two external power
MOSFETs: a P-channel MOSFET for the topside (main)
R DS ( ON ) MAX =
5 ? V SENSE ( MAX )
?
6 I OUT ( MAX )
for Duty Cycle < 20 %
switch and a N-channel MOSFET for the bottom (synchro-
nous) switch. The main selection criteria for the power
MOSFETs are the breakdown voltage V BR(DSS) , threshold
voltage V GS(TH) , on-resistance R DS(ON) , reverse transfer
capacitance C RSS , turn-off delay t D(OFF) and the total gate
However, for operation above 20% duty cycle, slope
compensation has to be taken into consideration to select
the appropriate value of R DS(ON) to provide the required
amount of load current:
charge Q G .
The gate drive voltage is the input supply voltage. Since the
LTC3808 is designed for operation down to low input
R DS ( ON ) MAX =
5
6
? SF ?
? V SENSE ( MAX )
I OUT ( MAX )
voltages, a sublogic level MOSFET (R DS(ON) guaranteed at
V GS = 2.5V) is required for applications that work close to
this voltage. When these MOSFETs are used, make sure
that the input supply to the LTC3808 is less than the
absolute maximum MOSFET V GS rating, which is typically
8V.
The P-channel MOSFET’s on-resistance is chosen based
on the required load current. The maximum average load
current I OUT(MAX) is equal to the peak inductor current
minus half the peak-to-peak ripple current I RIPPLE . The
LTC3808’s current comparator monitors the drain-to-
source voltage V DS of the top P-channel MOSFET, which
is sensed between the SENSE + and SW pins. The peak
inductor current is limited by the current threshold, set by
the voltage on the I TH pin, of the current comparator. The
voltage on the I TH pin is internally clamped, which limits
the maximum current sense threshold ? V SENSE(MAX) to
approximately 125mV when IPRG is floating (85mV when
IPRG is tied low; 204mV when IPRG is tied high).
The output current that the LTC3808 can provide is given
by:
where SF is a scale factor whose value is obtained from the
curve in Figure 1.
These must be further derated to take into account the
significant variation in on-resistance with temperature.
The following equation is a good guide for determining the
required R DS(ON)MAX at 25 ° C (manufacturer’s specifica-
tion), allowing some margin for variations in the LTC3808
and external component values:
5 ? V SENSE ( MAX )
R DS ( ON ) MAX = ? 0 . 9 ? SF ?
6 I OUT ( MAX ) ? ρ T
The ρ T is a normalizing term accounting for the tempera-
ture variation in on-resistance, which is typically about
0.4%/ ° C, as shown in Figure 2. Junction-to-case tempera-
ture T JC is about 10 ° C in most applications. For a maxi-
mum ambient temperature of 70 ° C, using ρ 80 ° C ~ 1.3 in
the above equation is a reasonable choice.
The N-channel MOSFET’s on resistance is chosen based
on the short-circuit current limit (I SC ). The LTC3808’s
short-circuit current limit comparator monitors the drain-
– RIPPLE
I OUT ( MAX ) =
? V SENSE ( MAX )
R DS ( ON )
I
2
to-source voltage V DS of the bottom N-channel MOSFET,
3808f
13
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