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参数资料
| 型号： | LTC3832EGN#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 16/24页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 16-SSOP |
| 标准包装： | 2,500 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 360kHz |
| 占空比： | 95% |
| 电源电压： | 3 V ~ 8 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
LTC3832/LTC3832-1
APPLICATIO S I FOR ATIO
LTC3832 application might exhibit 5A input ripple cur-
rent. Sanyo OS-CON capacitors, part number 10SA220M
(220 μ F/10V), feature 2.3A allowable ripple current at
85 ° C; three in parallel at the input (to withstand the input
ripple current) meet the above requirements. Similarly,
Sanyo POSCAP 4TPB470M (470 μ F/4V) capacitors have a
maximum rated ESR of 0.04 ? ; three in parallel lower the
net output capacitor ESR to 0.013 ? .
Feedback Loop Compensation
The LTC3832 voltage feedback loop is compensated at the
COMP pin, which is the output node of the error amplifier.
The feedback loop is generally compensated with an RC +
C network from COMP to GND as shown in Figure 10a.
7 SENSE +
Loop stability is affected by the values of the inductor, the
output capacitor, the output capacitor ESR, the error
amplifier transconductance and the error amplifier com-
pensation network. The inductor and the output capacitor
create a double pole at the frequency:
f LC = 1 / [ 2 π ( L O )( C OUT ) ]
The ESR of the output capacitor and the output capacitor
value form a zero at the frequency:
f ESR = 1 / [ 2 π ( ESR )( C OUT ) ]
The compensation network used with the error amplifier
must provide enough phase margin at the 0dB crossover
frequency for the overall open-loop transfer function. The
zero and pole from the compensation network are:
f Z = 1/[2 π (R C )(C C )] and
R C
C C
COMP
10
C1
LTC3832
ERR
V REF
R2
R1
V FB
6
SENSE –
5
3832 F10a
C2
f P = 1/[2 π (R C )(C1)] respectively
Figure 10b shows the Bode plot of the overall transfer
function.
When low ESR output capacitors (Sanyo OS-CON) are
used, the ESR zero can be high enough in frequency that
it provides little phase boost at the loop crossover fre-
quency. As a result, the phase margin becomes
inadequate and the load transient is not optimized. To
Figure 10a. Compensation Pin Hook-Up
f SW = LTC3832 SWITCHING
resolve this problem, a small capacitor can be connected
f SW = LTC3832 SWITCHING
f Z
FREQUENCY
f CO = CLOSED-LOOP CROSSOVER
FREQUENCY
FREQUENCY
f CO = CLOSED-LOOP CROSSOVER
FREQUENCY
f Z
20dB/DECADE
20dB/DECADE
f CO
f P
f P f PC2
f LC
f ESR
f CO
FREQUENCY
f LC
f ZC2
FREQUENCY
f ESR
3832 F10b
Figure 10b. Bode Plot of the LTC3832 Overall Transfer Function
3832 F10c
Figure 10c. Bode Plot of the LTC3832 Overall
Transfer Function Using a Low ESR Output Capacitor
sn3832 3832fs
16
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| LTC3833EUDC#PBF | 功能描述:IC REG CTRLR BUCK PWM CM 20-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
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