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| 型号： | LTC3834EFE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 13/28页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 20TSSOP |
| 标准包装： | 74 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 580kHz |
| 占空比： | 99.4% |
| 电源电压： | 4 V ~ 36 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽）裸露焊盘 |
| 包装： | 管件 |
| 产品目录页面： | 1336 (CN2011-ZH PDF) |
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LTC3834
APPLICATIONS INFORMATION
R SENSE =
V OUT ? 1 – OUT ?
Δ I L =
R SENSE Selection For Output Current
R SENSE is chosen based on the required output current.
The current comparator has a maximum threshold of
100mV/R SENSE and an input common mode range of
SGND to 10V. The current comparator threshold sets the
peak of the inductor current, yielding a maximum average
output current I MAX equal to the peak value less half the
peak-to-peak ripple current, Δ I L .
Allowing a margin for variations in the IC and external
component values yields:
8 0mV
I MAX
When using the controller in very low dropout conditions,
the maximum output current level will be reduced due to the
internal compensation required to meet stability criterion
for buck regulators operating at greater than 50% duty
factor. A curve is provided to estimate this reduction in
peak output current level depending upon the operating
duty factor.
Operating Frequency and Synchronization
The choice of operating frequency, is a trade-off between
ef?ciency and component size. Low frequency operation
improves ef?ciency by reducing MOSFET switching losses,
both gate charge loss and transition loss. However, lower
frequency operation requires more inductance for a given
amount of ripple current.
The internal oscillator of the LTC3834 runs at a nominal
400kHz frequency when the PLLLPF pin is left ?oating
and the PLLIN/MODE pin is a DC low or high. Pulling the
PLLLPF to INTVCC selects 530kHz operation; pulling the
PLLLPF to SGND selects 250kHz operation.
Alternatively, the LTC3834 will phase-lock to a clock
signal applied to the PLLIN/MODE pin with a frequency
between 140kHz and 650kHz (see Phase-Locked Loop
and Frequency Synchronization).
Inductor Value Calculation
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use
of smaller inductor and capacitor values. So why would
anyone ever choose to operate at lower frequencies with
larger components? The answer is ef?ciency. A higher
frequency generally results in lower ef?ciency because
of MOSFET gate charge losses. In addition to this basic
trade-off, the effect of inductor value on ripple current and
low current operation must also be considered.
The inductor value has a direct effect on ripple current.
The inductor ripple current Δ I L decreases with higher
inductance or frequency and increases with higher V IN :
1 ? V ?
( f )( L ) ? V IN ?
Accepting larger values of Δ I L allows the use of low
inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is Δ I L = 0.3(I MAX ). The maximum
Δ I L occurs at the maximum input voltage.
The inductor value also has secondary effects. The tran-
sition to Burst Mode operation begins when the average
inductor current required results in a peak current below
10% of the current limit determined by R SENSE . Lower
inductor values (higher Δ I L ) will cause this to occur at
lower load currents, which can cause a dip in ef?ciency in
the upper range of low current operation. In Burst Mode
operation, lower inductance values will cause the burst
frequency to decrease.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High ef?ciency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of more expensive ferrite or molypermalloy
cores. Actual core loss is independent of core size for a
?xed inductor value, but it is very dependent on inductance
selected. As inductance increases, core losses go down.
Unfortunately, increased inductance requires more turns
of wire and therefore copper losses will increase.
Ferrite designs have very low core loss and are preferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard,” which means that induc-
tance collapses abruptly when the peak design current is
3834fb
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| LTC3834EGN-1#PBF | 功能描述:IC REG CTRLR BUCK PWM CM 16-SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
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