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参数资料
| 型号： | LTC3835EUFD#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 稳压器 |
| 英文描述： | 3 A SWITCHING CONTROLLER, 580 kHz SWITCHING FREQ-MAX, PQCC20 |
| 封装： | 4 X 5 MM, LEAD FREE, PLASTIC, MO-220, QFN-20 |
| 文件页数： | 29/30页 |
| 文件大小： | 1775K |
| 代理商： | LTC3835EUFD#PBF |
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LTC3835
8
3835fd
PIN FUNCTIONS
CLKOUT (Pin 1/Pin 19): Open-Drain Output Clock Signal
available to daisychain other controller ICs for additional
MOSFET driver stages/phases.
PLLLPF (Pin 2/Pin 20): The phase-locked loop’s lowpass
filter is tied to this pin when synchronizing to an external
clock. Alternatively, tie this pin to GND, VIN or leave floating
to select 250kHz, 530kHz or 400kHz switching frequency.
ITH (Pin 3/Pin 1): Error Amplifier Outputs and Switching
Regulator Compensation Points. The current comparator
trip point increases with this control voltage.
TRACK/SS (Pin 4/Pin 2): External Tracking and Soft-Start
Input.TheLTC3835regulatestheVFBvoltagetothesmaller
of 0.8V or the voltage on the TRACK/SS pin. A internal 1A
pull-up current source is connected to this pin. A capacitor
to ground at this pin sets the ramp time to final regulated
output voltage. Alternatively, a resistor divider on another
voltage supply connected to this pin allows the LTC3835
output to track the other supply during startup.
VFB(Pin5/Pin3):Receivestheremotelysensedfeedbackvolt-
age from an external resistive divider across the output.
SGND (Pin 6, Exposed Pad Pin 21/Pin 4, Exposed Pad
Pin 21): Small Signal Ground. Must be routed separately
from high current grounds to the common (–) terminals
of the input capacitor. The exposed pad must be soldered
to the PCB for electrical contact and for rated thermal
performance.
PGND(Pin7/Pin5):DriverPowerGround.Connectstothe
sourceofbottom(synchronous)N-channelMOSFET,anode
of the Schottky rectifier and the (–) terminal of CIN.
BG (Pin 8/Pin 6): High Current Gate Drive for Bottom
(Synchronous) N-Channel MOSFET. Voltage swing at this
pin is from ground to INTVCC.
INTVCC (Pin 9/Pin 7): Output of the Internal Linear Low
Dropout Regulator. The driver and control circuit are
powered from this voltage source. Must be decoupled to
power ground with a minimum of 4.7F tantalum or other
low ESR capacitor.
EXTVCC(Pin10/Pin8):ExternalPowerInputtoanInternalLDO
Connected to INTVCC. This LDO supplies VCC power, bypass-
(FE Package/UFD Package)
ing the internal LDO powered from VIN whenever EXTVCC is
higher than 4.7V. See EXTVCC Connection in the Applications
Information section. Do not exceed 10V on this pin.
VIN(Pin11/Pin9):MainSupplyPin.Abypasscapacitorshould
be tied between this pin and the signal ground pin.
SW(Pin12/Pin10):SwitchNodeConnectionstoInductor.
VoltageswingatthispinisfromaSchottkydiode(external)
voltage drop below ground to VIN.
TG (Pin 13/Pin 11): High Current Gate Drive for Top
N-ChannelMOSFET.Thesearetheoutputsoffloatingdrivers
with a voltage swing equal to INTVCC–0.5Vsuperimposed
on the switch node voltage SW.
BOOST (Pin 14/Pin 12): Bootstrapped Supply to the Top
Side Floating Driver. A capacitor is connected between the
BOOST and SW pins and a Schottky diode is tied between
the BOOST and INTVCC pins. Voltage swing at the BOOST
pin is from INTVCC to (VIN + INTVCC).
RUN (Pin 15/Pin 13): Digital Run Control Input for
Controller. Forcing this pin below 0.7V shuts down all
controller functions, reducing the quiescent current that
the LTC3835 draws to approximately 10A.
SENSE– (Pin 16/Pin 14): The (–) Input to the Differential
Current Comparator.
SENSE+ (Pin 17/Pin 15): The (+) Input to the Differential
Current Comparator. The ITH pin voltage and controlled
offsets between the SENSE– and SENSE+ pins in conjunc-
tion with RSENSE set the current trip threshold.
PGOOD(Pin18/Pin16):Open-DrainLogicOutput.PGOOD
is pulled to ground when the voltage on the VFB pin is not
within ±10% of its set point.
PLLIN/MODE (Pin 19/Pin 17): External Synchronization
Input to Phase Detector and Forced Continuous Control
Input. When an external clock is applied to this pin, the
phase-locked loop will force the rising TG signal to be
synchronized with the rising edge of the external clock. In
this case, an R-C filter must be connected to the PLLLPF
pin. When not synchronizing to an external clock, this
input determines how the LTC3835 operates at light loads.
Pulling this pin below 0.7V selects Burst Mode operation.
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