参数资料
型号: LTC3838IFE#PBF
厂商: Linear Technology
文件页数: 31/54页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 38TSSOP
标准包装: 50
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 2MHz
电源电压: 4.5 V ~ 38 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 38-TFSOP (0.173",4.40mm 宽)裸露焊盘
包装: 管件
LTC3838
APPLICATIONS INFORMATION
V OUT1 must be set higher than V OUT2 . To implement the
ratiometric tracking, the master channel’s feedback divider
can be also used to provide TRACK/SS voltage for the slave
channel, since the additional divider, if used, should be of
the same ratio as the master channel’s feedback divider.
So which mode should be programmed? While either
mode satisfies most practical applications, some trade-
offs exist. The ratiometric mode saves a pair of resistors,
but the coincident mode offers better output regulation.
When the master channel’s output experiences dynamic
excursion (under load transient, for example), the slave
channel output will be affected as well. For better output
regulation, use the coincident tracking mode instead of
ratiometric.
Phase and Frequency Synchronization
For applications that require better control of EMI and
switching noise or have special synchronization needs, the
LTC3838 can synchronize the turn-on of the top MOSFET
to an external clock signal applied to the MODE/PLLIN pin.
The applied clock signal needs to be within ±30% of the
RT programmed frequency to ensure proper frequency
and phase lock. The clock signal levels should generally
comply to V PLLIN(H) > 2V and V PLLIN(L) < 0.5V. The MODE/
PLLIN pin has an internal 600k pull-down resistor to ensure
discontinuous current mode operation if the pin is left open.
The LTC3838 uses the voltages on V IN and V OUT as well
as R T to adjust the top gate on-time in order to maintain
phase and frequency lock for wide ranges of V IN , V OUT
and R T -programmed switching frequency f:
However, there could be circumstances where this V OUT
programmed on-time differs significantly different from
the on-time required in order to maintain frequency
and phase lock. For example, lower efficiencies in the
switching regulator can cause the required on-time to be
substantially higher than the internally set on-time (see
Efficiency Considerations). If a regulated V OUT is relatively
low, proportionally there could be significant error caused
by the difference between the local ground and remote
ground, due to other currents flowing through the shared
ground plane.
If necessary, the R T resistor value, voltage on the V IN pin,
or even the common mode voltage of the SENSE pins may
be programmed externally to correct for such systematic
errors. The goal is to set the on-time programmed by V IN ,
V OUT and R T close to the stready-state on-time so that the
system will have sufficient range to correct for component
and operating condition variations, or to synchronize to the
external clock. Note that there is an internal 500k resistor
on each SENSE – pin to SGND, but not on the SENSE + pin.
During dynamic transient conditions either in the line
voltage or load current (e.g., load step or release), the top
switch will turn on more or less frequently in response
to achieve faster transient response. This is the benefit
of the LTC3838’s controlled on-time, valley current mode
architecture. However, this process may understandably
lose phase and even frequency lock momentarily. For
relatively slow changes, phase and frequency lock can
still be maintained. For large load current steps with fast
slew rates, phase lock will be lost until the system returns
back to a steady-state condition (see Figure 10). It may
t ON ≈
V OUT
V IN ? f
take up to several hundred microseconds to fully resume
the phase lock, but the frequency lock generally recovers
quickly, long before phase lock does.
As the on-time is a function of the switching regulator’s
output voltage, this output is measured by the SENSE – pin
to set the required on-time. The SENSE – pin is tied to the
regulator’s local output point to the IC for most applica-
tions, as the remotely regulated output point could be
significantly different from the local output point due to
line losses, and local output versus local ground is typically
the V OUT required for the calculation of t ON .
For light load conditions, the phase and frequency syn-
chronization depends on the MODE/PLLIN pin setting. If
the external clock is applied, synchronization will be active
and switching in continuous mode. If MODE/PLLIN is tied
to INTV CC , it will operate in forced continuous mode at
the R T -programmed frequency. If the MODE/PLLIN pin is
tied to SGND, the LTC3838 will operate in discontinuous
3838fa
31
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