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参数资料
| 型号： | LTC3860EUH#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 8/36页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 32-QFN |
| 标准包装： | 73 |
| 系列： | PolyPhase® |
| PWM 型： | 电压模式 |
| 输出数： | 2 |
| 频率 - 最大： | 1.25MHz |
| 占空比： | 91.5% |
| 电源电压： | 3 V ~ 5 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 32-WFQFN 裸露焊盘 |
| 包装： | 管件 |
| 产品目录页面： | 1336 (CN2011-ZH PDF) |
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LTC3860
PIN FUNCTIONS
V CC (Pin 1): Chip Supply Voltage. Bypass this pin to GND
with a capacitor (0.1μF to 1μF ceramic) in close proximity
to the chip.
FB1 (Pin 2), FB2 (Pin 8): Error Ampli?er Inverting Inputs.
FB1 or FB2 can be connected to VSNSOUT via a resistor
divider for remote V OUT sensing. The bottom of the divider
should be connected to the SGND pin of the IC. The other
FB, when used, is typically connected to the other V OUT via
a resistor divider, also terminated at the IC SGND pin.
COMP1 (Pin 3), COMP2 (Pin 7): Error Ampli?er Outputs.
PWM duty cycle increases with this control voltage.
The error ampli?ers in the LTC3860 are true operational
ampli?ers with low output impedance. As a result, the
outputs of two active error ampli?ers cannot be directly
connected together! For multiphase operation, connecting
the FB pin on an error ampli?er to V CC will three-state
the output of that ampli?er. Multiphase operation can
then be achieved by connecting all of the COMP pins
together and using one channel as the master and all
others as slaves.
VSNSOUT (Pin 4): Differential Ampli?er Output.
VSNSN (Pin 5): Remote Sense Differential Ampli?er
Inverting Input. Connect this pin to sense ground at the
output load.
VSNSP (Pin 6): Remote Sense Differential Ampli?er
Noninverting Input. Connect this pin to V OUT at the output
load.
FREQ (Pin 10): Frequency Set/Select Pin. If CLKIN is high,
the resistor between this pin and SGND sets the switching
frequency. If CLKIN is low, the logic state of this pin sets
frequency. This pin sources 21μA.
CLKIN (Pin 11): External Clock Synchronization Input
Pin. If an external clock is present at this pin, the switch-
ing frequency will be synchronized to the external clock.
Otherwise, if high, a resistor from FREQ to SGND sets
frequency; if low, FREQ state sets frequency.
CLKOUT (Pin 12): Clock Output Pin. Used to synchronize
other LTC3860s.
PHSMD (Pin 13): Phase Mode Pin. Selects Ch1-Ch2 and
Ch1-CLKOUT phase relationship.
ISNS1N (Pin 21), ISNS2N (Pin 20): Current Sense Am-
pli?er (–) Input. The (–) input to the current ampli?er is
normally connected to the respective V OUT .
ISNS1P (Pin 22), ISNS2P (Pin 19): Current Sense Ampli?er
(+) Input. The (+) input to the current sense ampli?er is
normally connected to the midpoint of the inductor’s parallel
RC sense circuit or to the node between the inductor and
sense resistor if using a discrete sense resistor.
I LIM1 (Pin 23), I LIM2 (Pin 18): Current Comparator Sense
Voltage Limit Selection Pin. Connect a resistor from this
pin to SGND. This pin sources 20μA. The resultant voltage
sets the threshold for overcurrent protection.
RUN1 (Pin 24), RUN2 (Pin 17): Run Control Inputs. A
voltage above 2.25V on either pin turns on the IC. How-
ever, forcing either of these pins below 2V causes the IC
to shut down that particular channel. There are 1.5μA
pull-up currents for these pins.
PWM1 (Pin 25), PWM2 (Pin 16): (Top) Gate Signal Out-
put. This signal goes to the PWM or top gate input of the
external gate driver or integrated driver MOSFET. This is
a three-state compatible output.
PWMEN1/PWMEN2 (Pin 26/Pin 15): Enable Pin for Non-
Three-State compatible drivers. This pin has an internal
open-drain pull-up to V CC . An external resistor to SGND
is required. This pin is low when the corresponding PWM
pin is high impedance.
PGOOD1 (Pin 27), PGOOD2 (Pin 14): Power Good Pins.
Open-drain outputs that pull to ground when output volt-
age is not in regulation.
I AVG (Pin 28): Average Current Output Pin. A capacitor tied
to ground from this pin stores a voltage proportional to
the master’s instantaneous average current when multiple
outputs are paralleled. Tie the I AVG pin to ground when the
controller drives two independent outputs.
SGND (Pins 29, 30, Exposed Pad Pin 33): Ground. Pins
29, 30 and 33 are electrically connected internally. The
exposed pad must be soldered to the PCB for rated thermal
performance.
VINSNS (Pin 31): V IN Sense Pin. Connects to the V IN
power supply to provide line feedforward compensation.
3860fc
8
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相关代理商/技术参数 |
参数描述 |
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| LTC3860IUH#PBF | 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:2,000 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:1MHz 占空比:50% 电源电压:9 V ~ 10 V 降压:无 升压:是 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 85°C 封装/外壳:8-TSSOP（0.173"，4.40mm 宽） 包装:带卷 (TR) |
| LTC3860IUH#TRPBF | 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| LTC3861EUH-1#PBF | 制造商:Linear Technology 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN 制造商:Linear Technology 功能描述:BUCK CNTRL DUAL 12PH 2.25MHZ 32QFN 制造商:Linear Technology 功能描述:BUCK, CNTRL, DUAL, 12PH, 2.25MHZ, 32QFN 制造商:Linear Technology 功能描述:PWM CONTROLLER, BUCK, 2.25MHZ, 24V, QFN-32, Input Voltage:24V, Output Voltage:5.5V, Output Current:60A, Supply Voltage Min:3V, Supply Voltage Max:5.5V, Digital IC Case Style:QFN, No. of Pins:32, Frequency:2.25MHz , RoHS Compliant: Yes 制造商:Linear Technology 功能描述:DP-SWREG/Controller, Dual-Phase/Dual-Channel Step-Down Voltage Mode Controller w |
| LTC3861EUH-1#TRPBF | 制造商:Linear Technology 功能描述:IC REG CTRLR BUCK PWM VM 32-QFN |
| LTC3861EUHE#PBF | 功能描述:IC REG CTRLR BUCK PWM VM 36-QFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:PolyPhase® 标准包装:4,500 系列:PowerWise® PWM 型:控制器 输出数:1 频率 - 最大:1MHz 占空比:95% 电源电压:2.8 V ~ 5.5 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:6-WDFN 裸露焊盘 包装:带卷 (TR) 配用:LM1771EVAL-ND - BOARD EVALUATION LM1771 其它名称:LM1771SSDX |
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