参数资料
型号: LTC3868EUFD-1#PBF
厂商: Linear Technology
文件页数: 8/38页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 28-QFN
标准包装: 73
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 850kHz
占空比: 99.4%
电源电压: 4 V ~ 24 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-WFQFN 裸露焊盘
包装: 管件
产品目录页面: 1336 (CN2011-ZH PDF)
LTC3868-1
TYPICAL PERFORMANCE CHARACTERISTICS
Latchoff Thresholds
INTV CC vs Load Current
vs Temperature
5.20
V IN = 12V
2.3
2.2
5.15
5.10
5.05
EXTVCC = 0V
2.1
2.0
1.9
1.8
1.7
1.6
ARMING THRESHOLD
LATCH-OFF THRESHOLD
5.00
EXTVCC = 8V
1.5
1.4
1.3
4.95
0
20 40 60 80 100 120 140 160 180 200
1.2
–45
–20
5
30
55
80
105
130
LOAD CURRENT (mA)
38681 G26
TEMPERATURE (°C)
38681 G27
PIN FUNCTIONS
(QFN/SSOP)
SENSE1 – , SENSE2 – (Pin 2, Pin 8/Pin 4, Pin 10): The (–)
Input to the Differential Current Comparators. When greater
than INTV CC – 0.5V, the SENSE – pin supplies current to
the current comparator.
FREQ (Pin 3/Pin 5): The Frequency Control Pin for the
Internal VCO. Connecting this pin to GND forces the VCO
to a ?xed low frequency of 350kHz. Connecting this pin
to INTV CC forces the VCO to a ?xed high frequency of
535kHz. Other frequencies between 50kHz and 900kHz can
be programmed using a resistor between FREQ and GND.
An internal 20μA pull-up current develops the voltage to
be used by the VCO to control the frequency
PLLIN/MODE (Pin 4/Pin 6): External Synchronization
Input to Phase Detector and Forced Continuous Mode
Input. When an external clock is applied to this pin, the
phase-locked loop will force the rising TG1 signal to be
synchronized with the rising edge of the external clock.
When not synchronizing to an external clock, this input,
which acts on both controllers, determines how the
LTC3868-1 operates at light loads. Pulling this pin to
ground selects Burst Mode operation. An internal 100k
resistor to ground also invokes Burst Mode operation
when the pin is ?oated. Tying this pin to INTV CC forces
continuous inductor current operation. Tying this pin to
a voltage greater than 1.2V and less than INTV CC – 1.3V
selects pulse-skipping operation.
SGND (Pin 5, Exposed Pad Pin 29/Pin 7): Small-signal
ground common to both controllers, must be routed
separately from high current grounds to the common (–)
terminals of the C IN capacitors. The exposed pad (QFN
only) must be soldered to the PCB for rated thermal
performance.
RUN1, RUN2 (Pin 6, Pin 7/Pin 8, Pin 9): Digital Run
Control Inputs for Each Controller. Forcing either of these
pins below 1.26V shuts down that controller. Forcing both
of these pins below 0.7V shuts down the entire LTC3868-1,
reducing quiescent current to approximately 8μA. Do not
?oat these pins.
38681fd
8
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