参数资料
型号: LTC3890EUH#TRPBF
厂商: Linear Technology
文件页数: 18/40页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 32-QFN
产品培训模块: LTC3890 - 60V Low IQ, Dual, 2-Phase Synchronous Step-Down DC/DC Controller
标准包装: 2,500
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 850kHz
占空比: 99%
电源电压: 4 V ~ 60 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 32-WFQFN 裸露焊盘
包装: 带卷 (TR)
LTC3890
APPLICATIONS INFORMATION
V OUT
V IN ? V OUT
( I MAX ) 2 ( 1 + δ ) R DS(ON) +
P MAIN =
( V IN ) 2 ? MAX ? ( R DR ) ( C MILLER ) ?
? ( )
( I MAX ) 2 ( 1 + δ ) R DS(ON)
V – V OUT
Thepeak-to-peakdrivelevelsaresetbytheINTV CC voltage.
This voltage is typically 5.1V during start-up (see EXTV CC
Pin Connection). Consequently, logic-level threshold
MOSFETs must be used in most applications. Pay close
attention to the BV DSS specification for the MOSFETs as well.
Selection criteria for the power MOSFETs include the
on-resistance, R DS(ON) , Miller capacitance, C MILLER , input
voltage and maximum output current. Miller capacitance,
C MILLER , can be approximated from the gate charge curve
usually provided on the MOSFET manufacturers’ data
sheet. C MILLER is equal to the increase in gate charge
along the horizontal axis while the curve is approximately
flat divided by the specified change in V DS . This result is
then multiplied by the ratio of the application applied V DS
to the gate charge curve specified V DS . When the IC is
operating in continuous mode the duty cycles for the top
and bottom MOSFETs are given by:
Main Switch Duty Cycle =
V IN
Synchronous Switch Duty Cycle =
V IN
The MOSFET power dissipations at maximum output
current are given by:
V OUT
V IN
? I ?
? 2 ?
? 1 1 ?
? + f
? V INTVCC – V THMIN V THMIN ?
P SYNC = IN
V IN
where δ is the temperature dependency of R DS(ON) and
R DR (approximately 2Ω) is the effective driver resistance
at the MOSFET’s Miller threshold voltage. V THMIN is the
typical MOSFET minimum threshold voltage.
Both MOSFETs have I 2 R losses while the topside N-channel
equation includes an additional term for transition losses,
which are highest at high input voltages. For V IN < 20V
the high current efficiency generally improves with larger
MOSFETs, while for V IN > 20V the transition losses rapidly
increase to the point that the use of a higher R DS(ON) device
with lower C MILLER actually provides higher efficiency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
The term (1+ δ ) is generally given for a MOSFET in the
form of a normalized R DS(ON) vs Temperature curve, but
δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs.
The optional Schottky diodes D3 and D4 shown in
Figure 11 conduct during the dead-time between the
conduction of the two power MOSFETs. This prevents
the body diode of the bottom MOSFET from turning on,
storing charge during the dead-time and requiring a
reverse recovery period that could cost as much as 3%
in efficiency at high V IN . A 1A to 3A Schottky is generally
a good compromise for both regions of operation due
to the relatively small average current. Larger diodes
result in additional transition losses due to their larger
junction capacitance.
C IN and C OUT Selection
The selection of C IN is simplified by the 2-phase architec-
ture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can be
shown that the worst-case capacitor RMS current occurs
when only one controller is operating. The controller with
the highest (V OUT )(I OUT ) product needs to be used in the
formula shown in Equation 1 to determine the maximum
3890fc
18
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