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参数资料
| 型号： | LTC4085EDE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 15/24页 |
| 文件大小： | 0K |
| 描述： | IC USB POWER MANAGER 14-DFN |
| 标准包装： | 91 |
| 功能： | 电源管理 |
| 电池化学： | 锂离子（Li-Ion） |
| 电源电压： | 4.35 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-WFDFN 裸露焊盘 |
| 供应商设备封装： | 14-DFN-EP（4x3） |
| 包装： | 管件 |
| 产品目录页面： | 1341 (CN2011-ZH PDF) |
LTC4085
OPERATION
Programming Current Limit
The formula for input current limit is:
vents the OUT pin voltage from dropping significantly below
the BAT pin voltage. A comparison of the I-V curve of the
ideal diode and a Schottky diode can be seen in Figure 3.
I CL = ?
? V CLPROG ? =
? 1000
? R CLPROG
?
?
1000V
R CLPROG
If the input current increases beyond the programmed
input current limit additional current will be drawn from
the battery via the internal ideal diode. Furthermore, if
R CLPROG =
? 1000 = 2k
where V CLPROG is the CLPROG pin voltage and R CLPROG
is the total resistance from the CLPROG pin to ground.
For example, if typical 500mA current limit is required,
calculate:
1V
500mA
In USB applications, the minimum value for R CLPROG
should be 2.1k. This will prevent the application current
from exceeding 500mA due to LTC4085 tolerances and
quiescent currents. A 2.1k CLPROG resistor will give
a typical current limit of 476mA in high power mode
(HPWR = 1) or 95mA in low power mode (HPWR = 0).
V CLPROG will track the input current according to the fol-
lowing equation:
power to IN (USB V BUS ) or OUT (external wall adapter) is
removed, then all of the application power will be provided
by the battery via the ideal diode. A 4.7μF capacitor at OUT
is sufficient to keep a transition from input power to battery
power from causing significant output voltage droop. The
ideal diode consists of a precision amplifier that enables a
large P-channel MOSFET transistor whenever the voltage
at OUT is approximately 20mV (V FWD ) below the voltage at
BAT. The resistance of the internal ideal diode is approxi-
mately 200m Ω . If this is sufficient for the application then
no external components are necessary. However, if more
conductance is needed, an external PFET can be added from
BAT to OUT. The GATE pin of the LTC4085 drives the gate
of the PFET for automatic ideal diode control. The source
of the external PFET should be connected to OUT and the
drain should be connected to BAT. In order to help protect
the external PFET in overcurrent situations, it should be
I IN =
V CLPROG
R CLPROG
? 1000
placed in close thermal contact to the LTC4085.
For best stability over temperature and time, 1% metal
film resistors are recommended.
Ideal Diode from BAT to OUT
The LTC4085 has an internal ideal diode as well as a con-
troller for an optional external ideal diode. If a battery is the
only power supply available or if the load current exceeds
the programmed input current limit, then the battery will
automatically deliver power to the load via an ideal diode
circuit between the BAT and OUT pins. The ideal diode
I MAX
SLOPE: 1/R DIO(ON)
SCHOTTKY
DIODE
circuit (along with the recommended 4.7μ F capacitor on
the OUT pin) allows the LTC4085 to handle large transient
V FWD
FORWARD VOLTAGE (V)
(BAT-OUT)
4085 F03
loads and wall adapter or USB V BUS connect/disconnect
scenarios without the need for large bulk capacitors. The
Figure 3. LTC4085 Schottky Diode vs Forward Voltage Drop
ideal diode responds within a few microseconds and pre-
4085fd
15
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