参数资料
| 型号： | LTC4095EDC#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 9/16页 |
| 文件大小： | 0K |
| 描述： | IC CHARGER LI-ION/POLY 8-DFN |
| 标准包装： | 2,500 |
| 功能： | 充电管理 |
| 电池化学： | 锂离子（Li-Ion）、锂聚合物（Li-Pol） |
| 电源电压： | 4.35 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-WFDFN 裸露焊盘 |
| 供应商设备封装： | 8-DFN（2x2） |
| 包装： | 带卷 (TR) |
LTC4095
OPERATION
In any mode, the actual battery current can be determined
by monitoring the PROG pin voltage and using the follow-
ing equation:
When charging begins, ? C ? H ? R ? G is pulled low and remains
low for the duration of a normal charge cycle. When the
charge current has dropped to below 10% of the full-scale
I BAT =
PROG
R PROG
? 800
current, the ? C ? H ? R ? G pin is released (high impedance). If a
fault occurs after the ? C ? H ? R ? G pin is released, the pin re-
mains high impedance. However, if a fault occurs before
the ? C ? H ? R ? G pin is released, the pin is switched at 35kHz.
Thermal Regulation
To prevent thermal damage to the IC or surrounding
components, an internal thermal feedback loop will
automatically decrease the programmed charge current
if the die temperature rises to approximately 115°C.
Thermal regulation protects the LTC4095 from excessive
temperature due to high power operation or high ambient
thermal conditions and allows the user to push the limits
of the power handling capability with a given circuit board
While switching, its duty cycle is modulated between a high
and low value at a very low frequency. The low and high
duty cycles are disparate enough to make an LED appear
to be on or off thus giving the appearance of “blinking”.
Each of the two faults has its own unique “blink” rate for
human recognition as well as two unique duty cycles for
microprocessor recognition.
Table 1 illustrates the four possible states of the ? C ? H ? R ? G
pin when the battery charger is active.
design without risk of damaging the LTC4095 or external
components. The bene?t of the LTC4095 thermal regula-
tion loop is that charge current can be set according to
actual conditions rather than worst-case conditions with
Table 1. ? C ? H ? R ? G Output Pin
STATUS FREQUENCY
MODULATION
(BLINK)
FREQUENCY
DUTY CYCLE
the assurance that the battery charger will automatically
reduce the current in worst-case conditions.
Charge Status Indication
Charging
IBAT < C/10
NTC Fault
Bad Battery
0Hz
0Hz
35kHz
35kHz
0 Hz (Lo-Z)
0 Hz (Hi-Z)
1.5Hz at 50%
6.1Hz at 50%
100%
0%
6.25% to 93.75%
12.5% to 87.5%
The ? C ? H ? R ? G pin indicates the status of the battery charger.
Four possible states are represented by ? C ? H ? R ? G: charging,
not charging, unresponsive battery and battery temperature
out of range.
The signal at the ? C ? H ? R ? G pin can be easily recognized as one
of the above four states by either a human or a micropro-
cessor. The ? C ? H ? R ? G pin, which is an open-drain output, can
drive an indicator LED through a current limiting resistor
for human interfacing, or simply a pull-up resistor for
microprocessor interfacing.
To make the ? C ? H ? R ? G pin easily recognized by both humans
and microprocessors, the pin is either a DC signal of
ON for charging, OFF for not charging, or it is switched
at high frequency (35kHz) to indicate the two possible
faults: unresponsive battery and battery temperature out
of range.
An NTC fault is represented by a 35kHz pulse train whose
duty cycle varies between 6.25% and 93.75% at a 1.5Hz
rate. A human will easily recognize the 1.5Hz rate as a
“slow” blinking which indicates the out of range battery
temperature while a microprocessor will be able to decode
either the 6.25% or 93.75% duty cycles as an NTC fault.
If a battery is found to be unresponsive to charging (i.e.,
its voltage remains below V TRKL for over 1/2 hour), the
? C ? H ? R ? G pin gives the battery fault indication. For this fault,
a human would easily recognize the frantic 6.1Hz “fast”
blinking of the LED while a microprocessor would be able
to decode either the 12.5% or 87.5% duty cycles as a bad
battery fault.
Although very improbable, it is possible that a duty cycle
reading could be taken at the bright-dim transition (low
duty cycle to high duty cycle). When this happens the
duty cycle reading will be precisely 50%. If the duty cycle
reading is 50%, system software should disqualify it and
take a new duty cycle reading.
4095fa
9
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