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参数资料
| 型号： | LTC4252-2CMS8#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 电源管理 |
| 英文描述： | Negative Voltage Hot Swap Controllers; Package: MSOP; No of Pins: 8; Temperature Range: 0°C to +70°C |
| 中文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封装： | LEAD FREE, PLASTIC, MSOP-8 |
| 文件页数： | 9/36页 |
| 文件大小： | 336K |
| 代理商： | LTC4252-2CMS8#PBF |
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LTC4252-1/LTC4252-2
LTC4252A-1/LTC4252A-2
17
425212fc
APPLICATIONS INFORMATION
2.5% or more will eventually trip the circuit breaker and
shut down the LTC4252. Figure 5 shows the circuit breaker
response time in seconds normalized to 1μF for IDRN =
0μA. The asymmetric charging and discharging of CT is
a fair gauge of MOSFET heating.
The normalized circuit response time is estimated by
t
CT (μF)
=
4
235.8+8 IDRN
()D–5.8
(4)
SHUTDOWN COOLING CYCLE
For the LTC4252-1 (latchoff version), TIMER latches high
with a 5.8μA pull-up after the circuit breaker fault TIMER
reaches 4V. For the LTC4252-2 (automatic retry version),
a shutdown cooling cycle begins if TIMER reaches the
4V threshold. TIMER starts with a 5.8μA pull-down until
it reaches the 1V threshold. Then, the 5.8μA pull-up turns
back on until TIMER reaches the 4V threshold. Four 5.8μA
pull-down cycles and three 5.8μA pull-up cycles occur
between the 1V and 4V thresholds, creating a time interval
given by:
tSHUTDOWN =
7 3V CT
5.8μA
(5)
At the 1V threshold of the last pull-down cycle, a GATE
ramp-up is attempted.
SOFT-START
Soft-start limits the inrush current profile during GATE
start-up. Unduly long soft-start intervals can exceed the
MOSFET’s SOA rating if powering up into an active load.
If SS floats, an internal current source ramps SS from 0V
to 2.2V for the LTC4252 or 0V to 1.4V for the LTC4252A
in about 230μs. Connecting an external capacitor CSS
from SS to ground modifies the ramp to approximate an
RC response of:
VSS (t)≈VSS 1–e
–
t
RSS CSS
(6)
An internal resistive divider (95k/5k for the LTC4252 or
47.5k/2.5k for the LTC4252A) scales VSS(t) down by 20
times to give the analog current limit threshold:
VACL (t)=
VSS (t)
20
–VOS
(7)
This allows the inrush current to be limited to VACL(t)/RS.
The offset voltage, VOS (10mV), ensures CSS is sufficiently
discharged and the ACL amplifier is in current limit before
GATE start-up. SS is pulled low under any of the following
conditions: in UVLO, in an undervoltage condition, in an
overvoltage condition, during the initial timing cycle or
when the circuit breaker fault times out.
GATE
GATE is pulled low to VEE under any of the following
conditions: in UVLO, in an undervoltage condition, in an
overvoltage condition, during the initial timing cycle or
when the circuit breaker fault times out. When GATE turns
on, a 58μA current source charges the MOSFET gate and
any associated external capacitance. VIN limits the gate
drive to no more than 14.5V.
Gate-drain capacitance (CGD) feedthrough at the first
abrupt application of power can cause a gate-source
voltage sufficient to turn on the MOSFET. A unique circuit
pulls GATE low with practically no usable voltage at VIN
FAULT DUTY CYCLE (%)
0
20406080
100
NORMALIZED
RESPONSE
TIME
(s/μF)
10
1
0.1
0.01
425212 F05
=
4
DRN
t
CT(μF)
IDRN = 0μA
Figure 5. Circuit-Breaker Response Time
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相关代理商/技术参数 |
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|---|---|
| LTC4252-2CMS8TR | 制造商:LINER 制造商全称:Linear Technology 功能描述:Negative Voltage Hot Swap Controllers |
| LTC4252-2CMS8TRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:Negative Voltage Hot Swap Controllers |
| LTC4252-2CMSPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:Negative Voltage Hot Swap Controllers |
| LTC4252-2CMSTR | 制造商:LINER 制造商全称:Linear Technology 功能描述:Negative Voltage Hot Swap Controllers |
| LTC4252-2CMSTRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:Negative Voltage Hot Swap Controllers |
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