参数资料
型号: LTC4253ACGN#TRPBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 电源管理
英文描述: -48V Hot Swap Controller with Sequencer; Package: SSOP; No of Pins: 16; Temperature Range: 0°C to +70°C
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO16
封装: 0.150 INCH, LEAD FREE, PLASTIC, SSOP-16
文件页数: 2/34页
文件大小: 369K
代理商: LTC4253ACGN#TRPBF
LTC4253/LTC4253A
10
425353afd
pin FuncTions
TIMER (Pin 13): Timer Input. Timer is used to generate
an initial timing delay at start-up, and to delay shutdown
in the event of an output overload (circuit breaker fault).
Timer starts an initial timing cycle when the following
conditions are met: RESET is low, UV is high, OV is low,
VIN clears UVLO, TIMER pin is low, GATE pin is lower
than VGATEL, SS < 0.2V, and VSENSE – VEE < VCB. A pull-up
current of 5A then charges CT, generating a time delay.
If CT charges to VTMRH (4V), the timing cycle terminates.
TIMER quickly pulls low and GATE is activated.
IfSENSEexceeds50mVwhileGATEishigh,acircuitbreaker
cycle begins with a 200A pull-up current charging CT. If
DRAIN is approximately 7V (6V for the LTC4253A) dur-
ing this cycle, the timer pull-up has an additional current
of 8 IDRN. If SENSE drops below 50mV before TIMER
reaches 4V, a 5A pull-down current slowly discharges
the CT. In the event that CT eventually integrates up to
the VTMRH (4V) threshold, the circuit breaker trips, GATE
quickly pulls low and PWRGD1 pulls high. TIMER latches
high with a 5A pull-up source. This latched fault may be
cleared by driving RESET high until TIMER is pulled low.
Other ways of clearing the fault include pulling the VIN pin
momentarily below (VLKO– VLKH), pulling TIMER low with
an external device or pulling UV below 2.925V (2.756V
for the LTC4253A).
SQTIMER(Pin14):SequencingTimerInput.Thesequenc-
ingtimerprovidesadelaytSQTforthepowergoodsequenc-
ing. This delay is adjusted by connecting an appropriate
capacitor to this pin. If the SQTIMER capacitor is omitted,
the SQTIMER pin ramps from 0V to 4V in about 300s.
EN3 (Pin 15): Power Good Status Output Three Enable.
This is a TTL compatible input that is used to control the
PWRGD3 output. When EN3 is driven low, PWRGD3 will
go high. When EN3 is driven high, PWRGD3 will go low
provided PWRGD2 has been active for for more than one
power good sequence delay (tSQT). EN3 can be used to
control the power good sequence. This pin is internally
pulled low by a 120A current source.
PWRGD3 (Pin 16): Power Good Status Output Three.
Power good sequence starts with PWRGD1 latching active
low. PWRGD3 will latch active low after EN3 goes high
and after one power good sequence delay tSQT provided
by the sequencing timer from the time PWRGD2 goes
low, whichever comes later. PWRGD3 is reset by PWRGD1
going high or EN3 going low. This pin is internally pulled
high by a 50A current source.
相关PDF资料
PDF描述
LTC4253AIGN#PBF -48V Hot Swap Controller with Sequencer; Package: SSOP; No of Pins: 16; Temperature Range: -40&deg;C to +85&deg;C
LTC4253AIGN#TRPBF -48V Hot Swap Controller with Sequencer; Package: SSOP; No of Pins: 16; Temperature Range: -40&deg;C to +85&deg;C
LTC4253CGN#PBF -48V Hot Swap Controller with Sequencer; Package: SSOP; No of Pins: 16; Temperature Range: 0&deg;C to +70&deg;C
LTC4253CGN#TRPBF -48V Hot Swap Controller with Sequencer; Package: SSOP; No of Pins: 16; Temperature Range: 0&deg;C to +70&deg;C
LTC4253IGN#PBF -48V Hot Swap Controller with Sequencer; Package: SSOP; No of Pins: 16; Temperature Range: -40&deg;C to +85&deg;C
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