参数资料
型号: LTC4266AIUHF-4#TRPBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 电源管理
英文描述: POWER SUPPLY MANAGEMENT CKT, PQCC38
封装: 7 X 5 MM, LEAD FREE, PLASTIC, MO-220WHKD, QFN-38
文件页数: 6/28页
文件大小: 325K
代理商: LTC4266AIUHF-4#TRPBF
LTC4266A/LTC4266C
14
4266acf
Overview
Power over Ethernet, or PoE, is a standard protocol for
sending DC power over copper Ethernet data wiring.
The IEEE group that administers the 802.3 Ethernet data
standards added PoE powering capability in 2003. This
original PoE spec, known as 802.3af, allowed for 48V DC
power at up to 13W. This initial spec was widely popular,
but 13W was not adequate for some requirements. In
2009, the IEEE released a new standard, known as 802.3at
or PoE+, increasing the voltage and current requirements
to provide 25W of power.
The IEEE standard also defines PoE terminology. A device
that provides power to the network is known as a PSE, or
powersourcingequipment,whileadevicethatdrawspower
from the network is known as a PD, or powered device.
PSEs come in two types: Endpoints (typically network
switches or routers), which provide data and power; and
Midspans, which provide power but pass through data.
MidspansaretypicallyusedtoaddPoEcapabilitytoexisting
non-PoE networks. PDs are typically IP phones, wireless
access points, security cameras, and similar devices.
PoE++ Evolution
Even during the process of creating the IEEE PoE+ 25.5W
specification, it became clear that there was a significant
and increasing need for more than 25.5W of delivered
power. The LTC4266A family responds to this market by
allowing a reliable means of providing up to 90W of deliv-
ered power to a LTPoE++ PD. The LTPoE++ specification
pin Functions
GATE4: Port 4 Gate Drive. GATE4 should be connected
to the gate of the external MOSFET for port 4. When the
MOSFET is turned on, the gate voltage is driven to 13V
(typ) above VEE. During a current limit condition, the
voltage at GATE4 will be reduced to maintain constant
current through the external MOSFET. If the fault timer
expires, GATE4 is pulled down, turning the MOSFET off
and recording a tCUT or tSTART event. If the port is unused,
float the GATE4 pin.
OUT4: Port 4 Output Voltage Monitor. OUT4 should be
connected to the output port. A current limit foldback
circuit limits the power dissipation in the external MOSFET
by reducing the current limit threshold when the drain-to-
source voltage exceeds 10V. The port 4 Power Good bit is
set when the voltage from OUT4 to VEE drops below 2.4V
(typ). A 500k resistor is connected internally from OUT4
to AGND when the port is idle. If the port is unused, OUT4
pin must be floated.
SENSE3: Port 3 Current Sense Input. See SENSE4.
GATE3: Port 3 Gate Drive. See GATE4.
OUT3: Port 3 Output Voltage Monitor. See OUT4.
VEE: Main Supply Input. Connect to a –45V to –57V
supply, relative to AGND.
SENSE2: Port 2 Current Sense Input. See SENSE4.
GATE2: Port 2 Gate Drive. See GATE4.
OUT2: Port 2 Output Voltage Monitor. See OUT4.
SENSE1: Port 1 Current Sense Input. See SENSE4.
GATE1: Port 1 Gate Drive. See GATE 4.
OUT1: Port 1 Output Voltage Monitor. See OUT4.
AUTO: AUTO Pin Mode Input. AUTO pin mode allows the
LTC4266A/LTC4266C to detect and power up a PD even
if there is no host controller present on the I2C bus. The
voltage of the AUTO pin determines the state of the internal
registers when the LTC4266A/LTC4266C is reset or comes
out of VDD UVLO (see the LTC4266A/LTC4266C Software
Programmingdocumentation).Thestatesoftheseregister
bits can subsequently be changed via the I2C interface.
The real-time state of the AUTO pin is read at bit 0 in the
Pin Status register (11h). Internally pulled down to DGND.
Must be tied locally to either VDD or DGND.
MSD: Maskable Shutdown Input. Active low. When pulled
low, all ports that have their corresponding mask bit set
in the Misc Config register (17h) will be reset, equivalent
to pulling the SHDN pin low. Internal filtering of the MSD
pin prevents glitches less than 1s wide from resetting
ports. Internally pulled up to VDD.
operAtion
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相关代理商/技术参数
参数描述
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