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参数资料
| 型号： | LTC4266CIUHF#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 电源管理 |
| 英文描述： | POWER SUPPLY MANAGEMENT CKT, PQCC38 |
| 封装： | 7 X 5 MM, LEAD FREE, PLASTIC, MO-220WHKD, QFN-38 |
| 文件页数： | 13/28页 |
| 文件大小： | 325K |
| 代理商： | LTC4266CIUHF#PBF |
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LTC4266A/LTC4266C
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4266acf
ApplicAtions inForMAtion
802.3at 2-Event Classification
The 802.3at specification defines two methods of classify-
ing a Type 2 PD. The LTC4266A supports 802.3at 2-event
classification. The LTC4266C does not support 2-event
classification.
One method adds extra fields to the Ethernet LLDP data
protocol; although the LTC4266A/LTC4266C is compatible
with this classification method, it cannot perform clas-
sification directly since it doesn’t have access to the data
path. LLDP classification requires the PSE to power the
PD as a standard 802.3af (Type 1) device. It then waits
for the host to perform LLDP communication with the PD
and update the PSE port data. The LTC4266A/LTC4266C
supports changing the ILIM and ICUT levels on the fly, al-
lowing the host to complete LLDP classification.
The second 802.3at classification method, known as
2-event classification or ping-pong, is supported by the
LTC4266A. A Type 2 PD that is requesting more than 13W
will indicate Class 4 during normal 802.3af classification.
If the LTC4266A sees Class 4, it forces the port to a speci-
fied lower voltage (called the mark voltage, typically 9V),
pauses briefly, and then re-runs classification to verify the
Class 4 reading (Figure 1). It also sets a bit in the High
Power Status register to indicate that it ran the second
classification cycle. The second cycle alerts the PD that
it is connected to a Type 2 PSE which can supply Type 2
power levels.
2-event ping-pong classification is enabled by setting a bit
in the port’s High Power Mode register. Note that a ping-
pongenabledportonlyrunsthesecondclassificationcycle
when it detects a Class 4 device; if the first cycle returns
Class 0 to 3, the port assumes it is connected to a Type 1
PD and does not run the second classification cycle.
Invalid Type 2 Class Combinations
The 802.3at specification defines a Type 2 PD class sig-
nature as two consecutive Class 4 results; a Class 4 fol-
lowed by a Class 0-3 is not a valid signature. In AUTO pin
mode, the LTC4266A will power a detected PD regardless
of the classification results, with one exception: if the PD
presents an invalid Type 2 signature (Class 4 followed by
Class 0 to 3), the LTC4266A will not provide power and
will restart the detection process. To aid in diagnosis, the
Port Status register will always report the results of the
last class pulse, so, for example, an invalid Class 4–Class 2
combination would report a second class pulse was run
in the High Power Status register (which implies that the
first cycle found Class 4), and Class 2 in the Port Status
register.
POWER CONTROL
External MOSFET, Sense Resistor Summary
The primary function of the LTC4266A/LTC4266C is to
control the delivery of power to the PSE port. It does this
by controlling the gate drive voltage of an external power
MOSFET while monitoring the current via an external
sense resistor and the output voltage at the OUT pin. This
circuitry serves to couple the raw VEE input supply to the
port in a controlled manner that satisfies the PD’s power
needs while minimizing power dissipation in the MOSFET
and disturbances on the VEE backplane.
The LTC4266A/LTC4266C is designed to use 0.25 sense
resistors to minimize power dissipation. It also supports
0.5senseresistors,whicharethedefaultwhenLTC4258/
LTC4259A compatibility is desired.
Inrush Control
Once the command has been given to turn on a port, the
LTC4266A/LTC4266C ramps up the GATE pin of that port’s
external MOSFET in a controlled manner. Under normal
power-up circumstances, the MOSFET gate will rise until
the port current reaches the inrush current limit level
(typically 450mA), at which point the GATE pin will be
servoed to maintain the specified IINRUSH current. During
this inrush period, a timer (tSTART) runs. When output
chargingiscomplete,theportcurrentwillfallandtheGATE
pin will be allowed to continue rising to fully enhance the
MOSFET and minimize its on-resistance. The final VGS is
nominally 13V. The inrush period is maintained until the
tSTART timer expires. At this time if the inrush current limit
level is still exceeded the port will be turned back off and
a tSTART fault reported.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC4266CUHF#PBF | 制造商:Linear Technology 功能描述:POE Controller 25.5W 38-Pin QFN EP 制造商:Linear Technology 功能描述:IC POE CONTROLLER 3.3V QFN-38 制造商:Linear Technology 功能描述:IC, POE CONTROLLER, 3.3V, QFN-38; Input Voltage:3.3V; Supply Current:-2.4mA; UVLO:25V; Digital IC Case Style:QFN; No. of Pins:38; Frequency:1MHz; Operating Temperature Min:0C; Operating Temperature Max:70C; MSL:MSL 1 - Unlimited ;RoHS Compliant: Yes |
| LTC4266CUHF#TRPBF | 制造商:Linear Technology 功能描述:POE Controller 25.5W 38-Pin QFN EP |
| LTC4266IGW#PBF | 功能描述:IC CTRLR IEEE 802.3AT 36-SSOP RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:2,450 系列:- 控制器类型:SPI 总线至 I²C 总线桥接 接口:I²C，串行，SPI 电源电压:2.4 V ~ 3.6 V 电流 - 电源:11mA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:24-VFQFN 裸露焊盘 供应商设备封装:24-HVQFN（4x4） 包装:托盘 配用:568-3511-ND - DEMO BOARD SPI TO I2C 其它名称:935286452157SC18IS600IBSSC18IS600IBS-ND |
| LTC4266IGW#TRPBF | 制造商:Linear Technology 功能描述:Power Over Ethernet Controller 36-Pin SSOP W T/R 制造商:Linear Technology 功能描述:MS-Hot Swap/POE, PoE+ 25.5W Quad PSE Controller |
| LTC4266IUHF#PBF | 制造商:Linear Technology 功能描述:POE Controller 25.5W 38-Pin QFN EP 制造商:Linear Technology 功能描述:IC POE 802.3AT QUAD PSE 38-QFN 制造商:Linear Technology 功能描述:POE CNTRL QUAD 25.5W 1MHZ 制造商:Linear Technology 功能描述:IC, POE CONTROLLER, 3.3V, QFN-38; Input Voltage:3.3V; Supply Current:-2.4mA; UVLO:25V; Digital IC Case Style:QFN; No. of Pins:38; Frequency:1MHz; Operating Temperature Min:-40C; Operating Temperature Max:85C; MSL:MSL 1 - Unlimited ;RoHS Compliant: Yes |
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