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| 型号： | LTC4267IGN#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 9/32页 |
| 文件大小： | 0K |
| 描述： | IC POE 802.3AF INTERFACE 16SSOP |
| 标准包装： | 2,500 |
| 控制器类型： | 以太网供电控制器（POE） |
| 接口： | IEEE 802.3af |
| 电流 - 电源： | 3mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SSOP |
| 包装： | 带卷 (TR) |
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LTC4267
17
4267fc
Diode Bridge
IEEE 802.3af allows power wiring in either of two congu-
rations: on the TX/RX wires or via the spare wire pairs in
the RJ45 connector. The PD is required to accept power in
either polarity on either the main or spare inputs; therefore
it is common to install diode bridges on both inputs in
order to accommodate the different wiring congurations.
Figure 9 demonstrates an implementation of these diode
bridges. The IEEE 802.3af specication also mandates
that the leakage back through the unused bridge be less
than 28A when the PD is powered with 57V.
The IEEE standard includes an AC impedance requirement
in order to implement the AC disconnect function. Capaci-
tor C14 in Figure 9 is used to meet this AC impedance
requirement. A 0.1F capacitor is recommended for this
application.
The LTC4267 has several different modes of operation
based on the voltage present between VPORTN and VPORTP
pins. The forward voltage drop of the input diodes in a PD
design subtracts from the input voltage and will affect the
transition point between modes. When using the LTC4267,
it is necessary to pay close attention to this forward voltage
drop. Selection of oversized diodes will help keep the PD
thresholds from exceeding IEEE specications.
The input diode bridge of a PD can consume over 4%
of the available power in some applications. It may be
desirable to use Schottky diodes in order to reduce power
loss. However, if the standard diode bridge is replaced
with a Schottky bridge, the transition points between the
modes will be affected. Figure 10 shows a technique for
using Schottky diodes while maintaining proper threshold
points to meet IEEE 802.3af compliance. D13 is added to
compensate for the change in UVLO turn-on voltage caused
by the Schottky diodes and consumes little power.
Classication Resistor Selection (RCLASS)
The IEEE specication allows classifying PDs into four
distinct classes with class 4 being reserved for future use
(Table 2). An external resistor connected from RCLASS to
VPORTN (Figure 4) sets the value of the load current. The
designer should determine which power category the PD
falls into and then select the appropriate value of RCLASS
from Table 2. If a unique load current is required, the value
of RCLASS can be calculated as:
RCLASS = 1.237V/(IDESIRED – IIN_CLASS)
where IIN_CLASS is the LTC4267 IC supply current during
classication and is given in the electrical specications.
The RCLASSresistormustbe1%orbettertoavoiddegrading
the overall accuracy of the classication circuit. Resistor
power dissipation will be 50mW maximum and is transient
so heating is typically not a concern. In order to maintain
loop stability, the layout should minimize capacitance at
the RCLASS node. The classication circuit can be disabled
by oating the RCLASS pin. The RCLASS pin should not be
shorted to VPORTN as this would force the LTC4267 clas-
sication circuit to attempt to source very large currents
and quickly go into thermal shutdown.
Power Good Interface
The PWRGD signal is controlled by a high voltage, open-
drain transistor. The designer has the option of using this
signal to enable the onboard switching regulator through
the ITH/RUN or the PVCC pins. Examples of active-high
interface circuits for controlling the switching regulator
are shown in Figure 7.
In some applications, it is desirable to ignore intermittent
power bad conditions. This can be accomplished by in-
cluding capacitor C15 in Figure 7 to form a lowpass lter.
With the components shown, power bad conditions less
than about 200s will be ignored. Conversely, in other
applications it may be desirable to delay assertion of
PWRGD to the switching regulator using CPVCC or C17
as shown in Figure 7.
It is recommended that the designer use the power
good signal to enable the switching regulator. Using
PWRGD ensures the capacitor C1 has reached within
1.5V of the nal value and is ready to accept a load. The
LTC4267 is designed with wide power good hysteresis
to handle sudden uctuations in the load voltage and
current without prematurely shutting off the switching
regulator. Please refer to the Power-Up Sequencing of the
Application Information section.
APPLICATIO S I FOR ATIO
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