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参数资料
| 型号： | LTC4307IDD-1#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 3/12页 |
| 文件大小： | 163K |
| 描述： | IC BUFFER 2-WIRE BUS 8-DFN |
| 产品培训模块： | LTC4310 - Hot-Swappable I²C Isolators |
| 标准包装： | 2,500 |
| 类型： | 热交换开关 |
| 应用： | 通用型缓冲器/总线扩展器 |
| 内部开关： | 是 |
| 电源电压： | 2.3 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-WFDFN 裸露焊盘 |
| 供应商设备封装： | 8-DFN-EP（3x3） |
| 包装： | 带卷 (TR) |
LTC4307-1
3
43071fa
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
THR_ENABLE
ENABLE Threshold
0.8
1.4
2
V
I
ENABLE
ENABLE Input Current
ENABLE from 0V to V
CC
?/DIV>
0.1
?
糀
t
PLH_EN
ENABLE Delay Off-On
V
CC
= 3.3V (Figure 1)
95
約
t
PHL_EN
ENABLE Delay On-Off
V
CC
= 3.3V (Note 3) (Figure 1)
10
ns
t
PLH_READY
READY Delay Off-On
V
CC
= 3.3V (Note 3) (Figure 1)
10
ns
t
PHL_READY
READY Delay On-Off
V
CC
= 3.3V (Note 3) (Figure 1)
10
ns
V
OL_READY
READY Output Low Voltage
I
PULLUP
= 3mA, V
CC
= 2.3V
?/DIV>
0.4
V
I
OFF_READY
READY Off Leakage Current
V
CC
= READY = 5.5V
?/DIV>
0.1
?
糀
Propagation Delay
t
PHL
SDA/SCL Propagation Delay High to Low
C
LOAD
= 50pF, 2.7k to V
CC
on SDA, SCL,
V
CC
= 3.3V (Notes 2, 3) (Figure 1)
70
ns
t
PLH
SDA/SCL Propagation Delay Low to High
C
LOAD
= 50pF, 2.7k to V
CC
on SDA, SCL,
V
CC
= 3.3V (Notes 2, 3) (Figure 1)
10
ns
t
FALL
SDA/SCL Transition Time High to Low
C
LOAD
= 100pF, 10k to V
CC
on SDA, SCL,
V
CC
= 3.3V (Notes 3, 4) (Figure 1)
30
300
ns
Input-Output Connection
V
OS
Input-Output Offset Voltage
2.7k to V
CC
on SDA, SCL, V
CC
= 3.3V,
Driven SDA, SCL = 0.2V
?/DIV>
20
60
100
mV
V
THR
SDA, SCL Logic Input Threshold Voltage
Rising Edge
0.45V
CC
0.55V
CC
0.65V
CC
V
V
HYS
SDA, SCL Logic Input Threshold Voltage
Hysteresis
(Note 3)
50
mV
C
IN
Digital Input Capacitance SDAIN, SDAOUT,
SCLIN, SCLOUT
(Note 3)
10
pF
I
LEAK
Input Leakage Current
SDA, SCL, Pins
?/DIV>
?
糀
V
OL
Output Low Voltage
SDA, SCL Pins, I
SINK
= 4mA,
SDAIN/SCLIN = 0.2V, V
CC
= 2.7V
?/DIV>
0
0.4
V
2.7k to V
CC
on SDA, SCL, V
CC
= 3.3V,
Driven SDA, SCL = 0.1V
?/DIV>
120
160
205
mV
V
ILMAX
Buffer Input Logic Low Voltage
V
CC
= 3.3V
?/DIV>
1.2
V
Timing Characteristics
f
I2C,MAX
I
2
C Maximum Operating Frequency
(Note 3)
400
600
kHz
t
BUF
Bus Free Time Between Stop and Start
Condition
(Note 3)
1.3
約
t
HD,STA
Hold Time After (Repeated) Start Condition (Note 3)
100
ns
t
SU,STA
Repeated Start Condition Set-Up Time
(Note 3)
0
ns
t
SU,STO
Stop Condition Set-Up Time
(Note 3)
0
ns
t
HD,DATI
Data Hold Time Input
(Note 3)
0
ns
t
SU,DAT
Data Set-Up Time
(Note 3)
100
ns
The ?/SPAN> denotes the speci cations which apply over the full operating
temperature range, otherwise speci cations are at T
A
= 25癈. V
CC
= 3.3V, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: See Propagation Delays in the Operations section for a
discussion of t
PHL
and t
PLH
as a function of pull-up resistance and bus
capacitance.
Note 3: Determined by design, not tested in production.
Note 4: Measure points are 0.3 " V
CC
and 0.7 " V
CC
.
Note 5: I
CC
test performed with connection circuitry active.
Note 6: All currents into pins are positive; all voltages are referenced to
GND unless otherwise speci ed.
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