参数资料
型号: LTC4313CDD-3#PBF
厂商: Linear Technology
文件页数: 20/20页
文件大小: 0K
描述: IC 2WIRE BUS BUFFER 8DFN
标准包装: 121
类型: 2线总线缓冲器
Tx/Rx类型: I²C Logic
电容 - 输入: 10pF
电源电压: 2.9 V ~ 5.5 V
电流 - 电源: 8.1mA
安装类型: 表面贴装
封装/外壳: 8-WFDFN 裸露焊盘
供应商设备封装: 8-DFN(3x3)
包装: 管件
LTC4313-1/LTC4313-2/
LTC4313-3
9
4313123f
of the LTC4313-1 and LTC4313-2 must be greater than
or equal to 0.9VCC. An example is shown in Figure 3
where the input bus voltage is greater than VCC. During a
rising edge, the input bus rise rate will be accelerated by
the RTA up to a voltage of 2.97V after which the bus rise
rate will reduce to a value that is determined by the bus
current and bus capacitance. The RTA turn-off voltage is
less than the bus supply and the bus is not overdriven.
Pull-Up Resistor Value Selection
To guarantee that the RTAs are activated during a rising
edge, the bus must rise on its own with a positive slew rate
of at least 0.4V/s. To achieve this, choose a maximum
RBUS using the formula:
RBUS
VDD,BUS(MIN) VRTA(TH)
(
)
0.4
V
s
CBUS
(1)
RBUS is the pull-up resistor, VDD,BUS(MIN) is the minimum
bus pull-up supply voltage, VRTA(TH)isthevoltageatwhich
the RTA turns on and CBUS is the equivalent bus capaci-
tance. RBUS must also be large enough to guarantee that:
RBUS
VDD,BUS(MAX) 0.4V
(
)
4mA
(2)
This criterion ensures that the maximum bus current is
less than 4mA.
applicaTions inForMaTion
Input to Output Offset Voltage
While propagating a logic low voltage on its SDA and SCL
pins, the LTC4313 introduces a positive offset voltage
between the input and output. When a logic low voltage
≥200mV is driven on any of the LTC4313’s clock or data
pins, the LTC4313 regulates the voltage on the opposite
side to a slightly higher value. This is illustrated in Equa-
tion 3, which uses SDA as an example:
VSDAOUT = VSDAIN + 50mV + 15
VDD,BUS
RBUS
(3)
In Equation 3, VDD,BUS is the output bus supply voltage
and RBUS is the SDAOUT bus pull-up resistance.
For driven logic low voltages < 200mV Equation 3 does
not apply as the saturation voltage of the open collector
outputtransistorresultsinahigheroffset.Foradriveninput
logic low voltage below 220mV, the output is guaranteed
to be below a VOL of 400mV for bus pull-up currents up to
4mA. See the Typical Performance Characteristics section
for offset variation as a function of the driven logic low
voltage and bus pull-up current.
Figure 3. Level Shift Application Where the SDAIN and SCLIN Bus Pull-Up
Supply Voltage Is Higher Than the Supply Voltage of the LTC4313
LTC4313-1
GND
VCC
4313123 F03
READY
SCLOUT
SDAOUT
ENABLE
SCLIN
SDAIN
SCL1
SDA1
R2
10k
C1
0.01F
R1
10k
5V
READY
SCL2
SDA2
R4
10k
R3
10k
3.3V
R5
10k
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参数描述
LTC4313CMS8-1#PBF 功能描述:IC 2WIRE BUS BUFFER 8MSOP RoHS:是 类别:集成电路 (IC) >> 接口 - 信号缓冲器,中继器,分配器 系列:- 标准包装:160 系列:- 类型:转发器 Tx/Rx类型:以太网 延迟时间:- 电容 - 输入:- 电源电压:2.37 V ~ 2.63 V 电流 - 电源:60mA 安装类型:表面贴装 封装/外壳:64-TQFP 裸露焊盘 供应商设备封装:64-TQFP-EP(10x10) 包装:托盘 其它名称:Q5134101
LTC4313CMS8-1#TRPBF 功能描述:IC 2WIRE BUS BUFFER 8MSOP RoHS:是 类别:集成电路 (IC) >> 接口 - 信号缓冲器,中继器,分配器 系列:- 标准包装:160 系列:- 类型:转发器 Tx/Rx类型:以太网 延迟时间:- 电容 - 输入:- 电源电压:2.37 V ~ 2.63 V 电流 - 电源:60mA 安装类型:表面贴装 封装/外壳:64-TQFP 裸露焊盘 供应商设备封装:64-TQFP-EP(10x10) 包装:托盘 其它名称:Q5134101
LTC4313CMS8-2#PBF 功能描述:IC 2WIRE BUS BUFFER 8MSOP RoHS:是 类别:集成电路 (IC) >> 接口 - 信号缓冲器,中继器,分配器 系列:- 标准包装:160 系列:- 类型:转发器 Tx/Rx类型:以太网 延迟时间:- 电容 - 输入:- 电源电压:2.37 V ~ 2.63 V 电流 - 电源:60mA 安装类型:表面贴装 封装/外壳:64-TQFP 裸露焊盘 供应商设备封装:64-TQFP-EP(10x10) 包装:托盘 其它名称:Q5134101
LTC4313CMS8-2#TRPBF 功能描述:IC 2WIRE BUS BUFFER 8MSOP RoHS:是 类别:集成电路 (IC) >> 接口 - 信号缓冲器,中继器,分配器 系列:- 标准包装:160 系列:- 类型:转发器 Tx/Rx类型:以太网 延迟时间:- 电容 - 输入:- 电源电压:2.37 V ~ 2.63 V 电流 - 电源:60mA 安装类型:表面贴装 封装/外壳:64-TQFP 裸露焊盘 供应商设备封装:64-TQFP-EP(10x10) 包装:托盘 其它名称:Q5134101
LTC4313CMS8-3#PBF 功能描述:IC 2WIRE BUS BUFFER 8MSOP RoHS:是 类别:集成电路 (IC) >> 接口 - 信号缓冲器,中继器,分配器 系列:- 标准包装:160 系列:- 类型:转发器 Tx/Rx类型:以太网 延迟时间:- 电容 - 输入:- 电源电压:2.37 V ~ 2.63 V 电流 - 电源:60mA 安装类型:表面贴装 封装/外壳:64-TQFP 裸露焊盘 供应商设备封装:64-TQFP-EP(10x10) 包装:托盘 其它名称:Q5134101