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参数资料
| 型号： | LTC4366CTS8-2#TRMPBF |
| 厂商： | Linear Technology |
| 文件页数： | 5/24页 |
| 文件大小： | 0K |
| 描述： | IC SURGE STOPPER HV TSOT-23-8 |
| 标准包装： | 1 |
| 电压 - 工作： | 9V |
| 电压 - 箝位： | 可调式 |
| 技术： | 混合技术 |
| 电路数： | 1 |
| 应用： | 自动 |
| 封装/外壳： | SOT-23-8 薄型，TSOT-23-8 |
| 供应商设备封装： | TSOT-23-8 |
| 包装： | 标准包装 |
| 其它名称： | LTC4366CTS8-2#TRMPBFDKR |
LTC4366-1/LTC4366-2
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T A = 25°C. All voltages relative to V SS , unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
FB, SD , TIME R
V FB(REG)
3% FB pin Regulation Threshold (OUT-FB)
l
1.193
1.23
1.267
V
I FB
FB Pin Leakage Current
OUT-FB = 1.2V
l
0
±1
μA
V SD (TH)
V SD (HYST)
SD Pin Threshold Voltage (V DD - SD )
SD Pin Hysteresis
Falling
LTC4366C/I/H
LTC4366MP
l
l
l
1.0
147
129
1.5
280
280
2.3
530
530
V
mV
mV
I SD
SD Pin Input Pull-Up Current
V DD - SD = 0.7V
LTC4366C/I/H
LTC4366MP
l
l
–0.7
–0.5
–1.6
–1.6
–3.5
–3.5
μA
μA
V TIMER(H)
TIMER Pin Threshold
TIMER Rising, V DD = 7V, OUT = V Z(OUT)
l
2.6
2.8
3.1
V
I TIMER(UP)
I TIMER(DN)
TIMER Pin Pull-Up Current
TIMER Pin Pull-Down Current
TIMER = 1V
TIMER = 1V
LTC4366C/I/H
LTC4366MP
LTC4366C/I/H
LTC4366MP
l
l
l
l
–5.1
–4
0.9
0.7
–9
–9
1.8
1.8
–13
–13
2.8
2.8
μA
μA
μA
μA
I TIMER(RATIO) TIMER Pin Current Ratio I TIMER(DN) /I TIMER(UP)
l
15
20
25
%
AC Characteristics
t DLY- SD
t DLY-FAST
SD Low to Gate Low Filter Time
FB Low to Gate Low Delay Time
Step V DD - SD from 0V to 3V
Step OUT-FB from 0V to 1.3V
l
l
420
60
700
150
1200
300
μs
ns
t D(COOL)
Cool-Down Timer (Internal)
V DD = V Z(VDD)
LTC4366C/I/H
LTC4366MP
l
l
5.9
5.9
9
9
16
19
Seconds
Seconds
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive.
Note 3: Limits on the maximum rating is defined as whichever limit occurs
first. An internal clamp limits the GATE pin to a maximum of 12V above
source. Driving this pin to voltages beyond the clamp may damage the
device.
Note 4: T J is calculated from the ambient temperature, T A , and power
dissipation, P D , according to the formula:
T J = T A + (P D ? 250°C/W)
5
For more information www.linear.com/LTC4366
436612fd
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