参数资料
型号: LTC6404CUD-2#PBF
厂商: Linear Technology
文件页数: 14/28页
文件大小: 0K
描述: IC AMP/DRIVER DIFF 16-QFN
标准包装: 121
类型: ADC 驱动器
应用: 数据采集
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘
供应商设备封装: 16-QFN-EP(3x3)
包装: 管件
产品目录页面: 1323 (CN2011-ZH PDF)
LTC6404
21
6404f
APPLICATIONS INFORMATION
VINCM is dened as the average of the two input voltages
VINP, and VINM (also called the source-referred input com-
mon mode voltage):
VV
V
INCM
INP
INM
=+
()
1
2
and VINDIFF is dened as the difference of the input
voltages:
VINDIFF = VINP – VINM
When the feedback ratios mismatch (
Δβ), common mode
to differential conversion occurs.
Setting the differential input to zero (VINDIFF = 0), the de-
gree of common mode to differential conversion is given
by the equation:
VV
V
VV
V
OUTDIFF
OUT
INCM
OCM
AVG
I
=
()
Δ
+
β
N
NDIFF = 0
In general, the degree of feedback pair mismatch is a
source of common mode to differential conversion of both
signals and noise. Using 1% resistors or better will mitigate
most problems, and will provide about 34dB worst-case of
common mode rejection. Using 0.1% resistors will provide
about 54dB of common mode rejection. A low impedance
ground plane should be used as a reference for both the
input signal source, and the VOCM pin. A direct short of
VOCM to this ground or bypassing the VOCM with a high
quality 0.1μF ceramic capacitor to this ground plane, will
further prevent common mode signals from being con-
verted to differential.
There may be concern on how feedback ratio mismatch
affects distortion. Distortion caused by feedback ratio mis-
match using 1% resistors or better is negligible. However,
in single supply level shifting applications where there is
a voltage difference between the input common mode
voltage and the output common mode voltage, resistor
mismatch can make the apparent voltage offset of the
amplier appear higher than specied.
The apparent input referred offset induced by feedback
ratio mismatch is derived from the following equation:
VOSDIFF(APPARENT) ≈ (VICM – VOCM) Δβ
Using the LTC6404-1 in a single supply application on a
single 5V supply with 1% resistors, and the input common
mode grounded, with the VOCM pin biased at mid-supply,
the worst-case DC offset can induce 25mV of apparent
offset voltage. With 0.1% resistors, the worst case appar-
ent offset reduces to 2.5mV.
Input Impedance and Loading Effects
The input impedance looking into the VINP or VINM input
of Figure 1 depends on whether the sources VINP and
VINM are fully differential. For balanced input sources
(VINP = –VINM), the input impedance seen at either input
is simply:
RINP = RINM = RI
For single ended inputs, because of the signal imbalance
at the input, the input impedance increases over the bal-
anced differential case. The input impedance looking into
either input is:
RR
R
RR
INP
INM
I
F
IF
==
+
1
2
Input signal sources with non-zero output impedances can
also cause feedback imbalance between the pair of feedback
networks. For the best performance, it is recommended
that the source’s output impedance be compensated for.
If input impedance matching is required by the source,
R1 should be chosen (see Figure 4):
R
RR
INM
S
INM
S
1 =
Figure 4. Optimal Compensation for Signal Source Impedance
VS
+
+
RF
RI
RINM
RS
RI
R2 = RS || R1
R1 CHOSEN SO THAT R1 || RINM = RS
R2 CHOSEN TO BALANCE R1 || RS
R1
6404 F04
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