参数资料
| 型号： | LTC6601CUF-2#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 5/40页 |
| 文件大小： | 0K |
| 描述： | IC DRVR FILTER/ADC LN 20-QFN |
| 标准包装： | 91 |
| 频率 - 截止或中心： | 27MHz |
| 滤波器数： | 3 |
| 滤波器阶数： | 2nd |
| 电源电压： | 2.7 V ~ 5.25 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-WFQFN 裸露焊盘 |
| 供应商设备封装： | 20-QFN 裸露焊盘（4x4） |
| 包装： | 管件 |
| 产品目录页面： | 1323 (CN2011-ZH PDF) |
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LTC6601-2
13
66012f
V+, V– (Pins 14, 13): Power Supply Pins. It is critical that
close attention be paid to supply bypassing. For single
supply applications (Pin 13 grounded), it is recommended
that a high quality 0.1μF surface mount ceramic bypass
capacitor (X7R dielectric for instance) be placed between
Pins 14 and 13, with direct short connections. Pin 13
should be tied directly to a low impedance ground plane
with minimal routing. For dual (split) power supplies, it
is recommended that at least two additional high quality
0.1μF ceramic capacitors are used to bypass V+ to ground
and V– to ground, again with minimal routing. For driving
large loads (< 200Ω), additional bypass capacitance may
be added for optimal performance. Keep in mind that small
geometry (e.g., 0603) surface mount ceramic capacitors
have a much lower ESL than do leaded capacitors, and
perform best in high speed applications.
C7, C8 (Pins 17, 16): Input to a trimmed 10.55pF, 21.1pF
capacitor which feeds the amplier noninverting sum-
ming node. Typically, either oat or tie to OUT–. For best
performance, stray capacitance should be kept as low as
possible by keeping printed circuit connections as short
and direct as possible.If necessary, strip back the sur-
rounding ground plane away from these pins.
C5, C6 (Pins 19, 18): Input to a trimmed 16.1pF, 33.3pF
capacitor which feeds an inverting summing node. Typi-
cally, either oat or tie to OUT+. If either of these pins are
tied to a low impedance source other than OUT+, a re-
sistance of at least 25Ω should be placed in series. For
best performance, it is highly recommended that stray
capacitance be kept to as low as possible by keeping printed
circuit connections as short and direct as possible, and if
necessary, stripping back nearby surrounding reference
plane away from these pins.
Exposed Pad (Pin 21): Always tie the underlying Exposed
Pad to V– (Pin 13). If split supplies are used, do not tie
the pad to ground. Tie it to V–.
PIN FUNCTIONS (Refer to the Block Diagram)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC6601CUF-2TRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:Low Power, Low Distortion, 5MHz to 27MHz, Pin Confi gurable Filter/ADC Driver |
| LTC6601IUF-1#PBF | 功能描述:IC DRVR FILTER/ADC LN 20-QFN RoHS:是 类别:集成电路 (IC) >> 接口 - 滤波器 - 有源 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1,000 系列:- 滤波器类型:连续时间，带通低通 频率 - 截止或中心:150kHz 滤波器数:4 滤波器阶数:8th 电源电压:4.74 V ~ 11 V，±2.37 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC W 包装:带卷 (TR) |
| LTC6601IUF-1#TRPBF | 功能描述:IC DRVR FILTER/ADC LN 20-QFN RoHS:是 类别:集成电路 (IC) >> 接口 - 滤波器 - 有源 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1,000 系列:- 滤波器类型:连续时间，带通低通 频率 - 截止或中心:150kHz 滤波器数:4 滤波器阶数:8th 电源电压:4.74 V ~ 11 V，±2.37 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:28-SOIC（0.295"，7.50mm 宽） 供应商设备封装:28-SOIC W 包装:带卷 (TR) |
| LTC6601IUF-1-PBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:Low Noise, 0.5% Tolerance, 5MHz to 28MHz, Pin Confi gurable Filter/ADC Driver |
| LTC6601IUF-1-TRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:Low Noise, 0.5% Tolerance, 5MHz to 28MHz, Pin Confi gurable Filter/ADC Driver |
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