参数资料
型号: LTC660CN8#PBF
厂商: Linear Technology
文件页数: 7/12页
文件大小: 0K
描述: IC REG DBL INV ADJ 0.1A 8DIP
标准包装: 50
类型: 倍增器,反相
输出类型: 可调式
输出数: 1
输出电压: -1.5 V ~ -5.5 V,5 V ~ 11 V
输入电压: 1.5 V ~ 5.5 V,2.5 V ~ 5.5 V
频率 - 开关: 10kHz,80kHz
电流 - 输出: 100mA
同步整流器:
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
包装: 管件
供应商设备封装: 8-PDIP
LTC660
APPLICATIO N S I N FOR M ATIO N
V +
REQUIRED FOR TTL LOGIC
V +
7.0I
I
NC
1
8
100k
BOOST
(1)
C1
+
2
3
4
LTC660
7
6
5
–(V + )
OSC INPUT
C2
OSC
SCHMITT
LV
(6)
7.0I
I
(7)
~ 18pF
TRIGGER
LTC660 ? F05
Figure 6. External Clocking
Capacitor Selection
LTC660 ? F06
Figure 5. Oscillator
By connecting the BOOST pin (Pin 1) to V + , the charge and
discharge current is increased and, hence, the frequency
is increased by approximately four and a half times.
Increasing the frequency will decrease output impedance
and ripple for high load currents.
Loading Pin 7 with more capacitance will lower the fre-
quency. Using the BOOST (Pin 1) in conjunction with
external capacitance on Pin 7 allows user selection of the
frequency over a wide range.
Driving the LTC660 from an external frequency source can
be easily achieved by driving Pin 7 and leaving the BOOST
pin open, as shown in Figure 6. The output current from
Pin 7 is small, typically 1.1 μ A to 8 μ A, so a logic gate is
capable of driving this current. (A CMOS logic gate can be
used to drive the OSC pin.) For 5V applications, a TTL logic
gate can be used by simply adding an external pull-up
resistor (see Figure 6).
While the exact values of C1 and C2 are noncritical, good
quality, low ESR capacitors are necessary to minimize
voltage losses at high currents. For C1 the effect of the ESR
of the capacitor will be multiplied by four, due to the fact
the switch currents are approximately two times higher
than the output current and losses will occur on both the
charge and discharge cycle. This means using a capacitor
with 1 ? of ESR for C1 will have the same effect as
increasing the output impedance of the LTC660 by 4 ? .
This represents a significant increase in the voltage losses.
For C2 the effect of ESR is less dramatic. A C2 with 1 ? of
ESR will increase the output impedance by 1 ? . The size
of C2 and the load current will determine the output
voltage ripple. It is alternately charged and discharged at
a current approximately equal to the output current. This
will cause a step function to occur in the output voltage at
the switch transitions. For example, for a switching fre-
quency of 5kHz (one-half the nominal 10kHz oscillator
frequency) and C2 = 150 μ F with an ESR of 0.2 ? , ripple is
approximately 90mV with a 100mA load current.
7
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LTC660CS8#PBF 功能描述:IC REG DBL INV ADJ 0.1A 8SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压(降压) 输出类型:固定 输出数:1 输出电压:1.2V,1.5V,1.8V,2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP,10-MSOP(0.118",3.00mm 宽)裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘
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