参数资料
| 型号： | LTC6906IS6#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 14/14页 |
| 文件大小： | 0K |
| 描述： | IC OSC SILICON 1MHZ TSOT23-6 |
| 标准包装： | 2,500 |
| 类型： | 振荡器 - 硅 |
| 频率： | 10kHz ~ 1MHz |
| 电源电压： | 2.25 V ~ 3.6 V |
| 电流 - 电源： | 78µA |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | SOT-23-6 细型，TSOT-23-6 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | TSOT-23-6 |
| 安装类型： | 表面贴装 |
LTC6906
9
6906fc
APPLICATIONS INFORMATION
Guarding Against PC Board Leakage
The LTC6906 uses relatively large resistance values for
RSET to minimize power consumption. For RSET = 1M, the
SET pin current is typically only 0.65μA. Thus, only 0.65nA
leaking into the SET pin causes a 0.1% frequency error.
Similarly, 1G of leakage resistance across RSET (1000
RSET) causes the same 0.1% error.
Achieving the highest accuracy requires controlling poten-
tial leakage paths. PC board leakage is aggravated by both
dirt and moisture. Effective cleaning is a good first step to
minimizing leakage, and some PC board manufacturers
offer high impedance or low leakage processing options.
Another effective method for controlling leakage is to shunt
the leakage current away from the sensitive node through
a low impedance path. The LTC6906 provides a signal on
the GRD pin for this purpose. Figure 10 shows a PC board
layout that uses the GRD pin and a “guard ring” to absorb
leakage currents. The guard ring surrounds the SET pin
and the end of RSET to which it is connected. The guard
ring must have no solder mask covering it to be effective.
The GRD pin voltage is held within a few millivolts of the
SET pin voltage, so any leakage path between the SET pin
and the guard ring generates no leakage current.
LTC6906
RSET
OUT
GND
DIV
LEAKAGE
CURRENT
NO LEAKAGE
CURRENT
GUARD
RING
V+
GRD
SET
6906 F10
1
2
3
6
5
4
NO SOLDER MASK
OVER THE GUARD RING
Figure 10. PC Board Layout with Guard Ring
Figure 11. Simplified Equivalent of the Output Driver
and On-Chip Decoupling Circuit
Bypassing the Power Supply
The LTC6906 has on-chip power supply decoupling that
eliminates the need for an external decoupling capacitor
in most cases. Figure 11 shows a simplified equivalent
circuit of the output driver and on-chip decoupling network.
When the output driver switches from low to high, the
800pF capacitor delivers the current needed to charge the
off-chip capacitive load. Within nanoseconds the system
power supply recharges the 800pF capacitor.
Figure 12 shows a test circuit for evaluating perfor-
mance of the LTC6906 with a highly inductive, 330nH
power supply. Figure 13 shows the effectiveness of the
on-chip decoupling network. For CLOAD = 5pF to 50pF, the
output waveforms remain well formed.
The extremely low supply current of the LTC6906 allows
operation with substantial resistance in the power supply.
Figure 14 shows a test circuit for evaluating performance
of the LTC6906 with a highly resistive, 100Ω power sup-
ply. Figure 15 shows the effectiveness of the on-chip
decoupling network. For CLOAD = 5pF to 50pF, the output
waveforms remain well formed. With a 50pF load, a very
small (2.5%) slow tail can be seen on the rising edge. The
output waveform is still well formed even in this case.
The ability of the LTC6906 to operate with a resistive
supply permits supplying power via a CMOS logic gate
or microcontroller pin. Since the LTC6906 has a turn-on
time of less than 200μs, this technique can be used to
enable the device only when needed and further reduce
power consumption.
6
V+
1
OUT
300Ω
20Ω
800pF
fOUT
2
GND
ESD DIODES
CLOAD
V+
6906 F11
DRIVER
LTC6906-1
DECOUPLING
NETWORK
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