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| 型号： | LTC693CSW |
| 厂商： | Linear Technology |
| 文件页数： | 11/20页 |
| 文件大小： | 0K |
| 描述： | IC MPU SUPERVISRY CIRCUIT 16SOIC |
| 标准包装： | 47 |
| 类型： | 简单复位/加电复位 |
| 监视电压数目： | 1 |
| 输出： | 开路漏极或开路集电极 |
| 复位： | 高有效/低有效 |
| 复位超时： | 最小为 140 ms |
| 电压 - 阀值： | 4.4V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 管件 |
| 产品目录页面： | 1336 (CN2011-ZH PDF) |
| 其它名称： | LTC693CS |
LTC692/LTC693
APPLICATIONS INFORMATION
If battery connections are made through long wires, a
Table 1. Input and Output Status in Battery Backup Mode
10Ω to 100Ω series resistor and a 0.1μF capacitor are
recommended to prevent any overshoot beyond V CC due
to the lead inductance (Figure 4).
Table 1 shows the state of each pin during battery backup.
When the battery switchover section is not used, connect
V BATT to GND and V OUT to V CC .
SIGNAL
V CC
V OUT
V BATT
BATT ON
PFI
PFO
STATUS
C2 monitors V CC for active switchover
V OUT is connected to V BATT through an internal PMOS switch
The supply current is 1μA maximum
Logic high. The open-circuit output voltage is equal to V OUT
Power failure input is ignored
Logic low
10Ω
3.9M
0.1μF
V BATT
LTC692
LTC693
GND
RESET Logic low
RESET Logic high. The open-circuit output voltage is equal to V OUT
LOW LINE Logic low
WDI
Watchdog input is ignored
WDO
Logic high. The open-circuit output voltage is equal to V OUT
CE IN
Chip Enable input is ignored
692_3 ? F04
Figure 4. 10Ω/0.1μF Combination Eliminates Inductive
Overshoot and Prevents Spurious Resets During Battery
Replacement
CE OUT
OSC IN
OSC SEL
Logic high. The open-circuit output voltage is equal to V OUT
OSC IN is ignored
OSC SEL is ignored
Memory Protection
The LTC693 includes memory protection circuitry which
ensures the integrity of the data in memory by preventing
write operations when V CC is at an invalid level. Two ad-
ditional pins, CE IN and CE OUT, control the Chip Enable
or Write inputs of CMOS RAM. When V CC is 5V, CE OUT
follows CE IN with a typical propagation delay of 20ns.
When V CC falls below the reset voltage threshold or V BATT ,
CE OUT is forced high, independent of CE IN. CE OUT is
an alternative signal to drive the CE , CS , or Write input of
battery backed up CMOS RAM. CE OUT can also be used
to drive the Store or Write input of an EEPROM, EAROM
or NOVRAM to achieve similar protection. Figure 5 shows
the timing diagram of CE IN and CE OUT.
CE IN can be derived from the microprocessor’s address
decoder output. Figure 6 shows a typical nonvolatile CMOS
RAM application.
Memory protection can also be achieved with the LTC692
by using RESET as shown in Figure 7.
V CC
V1
V2
V1 = RESET VOLTAGE THRESHOLD
V2 = RESET VOLTAGE THRESHOLD +
RESET THRESHOLD HYSTERESIS
CE IN
CE OUT
V OUT = V BATT
Figure 5. Timing Diagram for CE IN and CE OUT
V OUT = V BATT
692_3 ? F05
0692fb
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC693CSW#PBF | 功能描述:IC MPU SUPERVISRY CIRCUIT 16SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 其它有关文件:STM6717 View All Specifications 标准包装:1 系列:- 类型:多压监控器 监视电压数目:2 输出:开路漏极或开路集电极 复位:低有效 复位超时:最小为 600 ms 电压 - 阀值:1.11V，3.075V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SC-74A，SOT-753 供应商设备封装:SOT-23-5 包装:Digi-Reel® 产品目录页面:1194 (CN2011-ZH PDF) 其它名称:497-7019-6 |
| LTC693CSW#TR | 功能描述:IC SUPERVISORY CIRC MPU 16SOIC RoHS:否 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 标准包装:1 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:高有效 复位超时:- 电压 - 阀值:1.8V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:6-TSOP（0.059"，1.50mm 宽）5 引线 供应商设备封装:5-TSOP 包装:剪切带 (CT) 其它名称:NCP301HSN18T1GOSCT |
| LTC693CSW#TRPBF | 功能描述:IC MPU SUPERVISRY CIRCUIT 16SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 标准包装:1 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:高有效 复位超时:- 电压 - 阀值:1.8V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:6-TSOP（0.059"，1.50mm 宽）5 引线 供应商设备封装:5-TSOP 包装:剪切带 (CT) 其它名称:NCP301HSN18T1GOSCT |
| LTC693I | 制造商:LINER 制造商全称:Linear Technology 功能描述:Microprocessor Supervisory Circuits |
| LTC693IN | 制造商:LINER 制造商全称:Linear Technology 功能描述:Microprocessor Supervisory Circuits |
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