- 您现在的位置：买卖IC网 > PDF目录79688 > LTC6992CDCB6-2#PBF (LINEAR TECHNOLOGY CORP) SWITCHING CONTROLLER, PDSO6 PDF资料下载
参数资料
| 型号： | LTC6992CDCB6-2#PBF |
| 厂商： | LINEAR TECHNOLOGY CORP |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING CONTROLLER, PDSO6 |
| 封装： | 2 X 3 MM, LEAD FREE, PLASTIC, MO-229TBD, DFN-6 |
| 文件页数： | 8/32页 |
| 文件大小： | 322K |
| 代理商： | LTC6992CDCB6-2#PBF |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
LTC6992-1/LTC6992-2/
LTC6992-3/LTC6992-4
16
69921234p
Pulse Width (Duty Cycle) Modulation
The MOD pin is a high impedance analog input providing
direct control of the output duty cycle. The duty cycle
is proportional to the voltage applied to the MOD pin,
VMOD.
Duty Cycle = D =
VMOD
0.8 VSET
1
8
The PWM duty cycle accuracy
ΔD specifies that the above
equation is valid to within ±4.5% for VMOD between 0.2
VSET and 0.8 VSET (12.5% to 87.5% duty cycle).
Since VSET = 1V ±30mV, the duty cycle equation may be
approximated by the following equation.
Duty Cycle = D
VMOD 100mV
800mV
The VMOD control range is approximately 0.1V to 0.9V.
Driving VMOD beyond that range (towards GND or V+) will
have no further affect on the duty cycle.
Duty Cycle Limits
The only difference between the four versions of the
LTC6992 is the limits, or clamps, placed on the output
duty cycle. The LTC6992-1 generates output duty cycles
ranging from 0% to 100%, meaning the output can stop
oscillating and rest at GND or V+.
The LTC6992-2 will never stop oscillating, regardless of
the VMOD level. Internal clamping circuits limit its duty
cycle to a 5% to 95% range (1% to 99% guaranteed).
Therefore, its VMOD control range is 0.14 VSET to 0.86
VSET (approximately 0.14V to 0.86V).
The LTC6992-3 and LTC6992-4 complete the family by
providing one-sided clamping. The LTC6992-3 allows
0% to 95% duty cycle, and the LTC6992-4 allows 5% to
100% duty cycle.
Output Polarity (POL Bit)
The duty cycle equation describes a proportional transfer
function, where duty cycle increases as VMOD increases.
The LTC6992 includes a POL bit (determined by the
DIVCODE as described earlier) that inverts the output
signal. This makes the duty cycle gain negative, reducing
duty cycle as VMOD increases.
OPERATION
Figure 3. POL Bit Functionality
6992 F03
OUT
POL = 1
tOUT
DtOUT
OUT
POL = 0
tOUT
DtOUT
D
VMOD
0.8 VSET
1
8
D 1
VMOD
0.8 VSET
1
8
相关PDF资料 |
PDF描述 |
|---|---|
| LM2675-3.3MWC | 2.2 A SWITCHING REGULATOR, 275 kHz SWITCHING FREQ-MAX, UUC |
| LM4051BIX3-1.2+T | 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 1.225 V, PDSO3 |
| LT1840-7DZB1 | 1-OUTPUT AC-DC REG PWR SUPPLY MODULE |
| LTC3873ITS8-5#PBF | SWITCHING CONTROLLER, PDSO8 |
| LES40A48-2V5RA | 1-OUTPUT 100 W DC-DC REG PWR SUPPLY MODULE |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC6992CDCB6-2-TRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:TimerBlox Voltage-Controlled Pulse Width Modulator (PWM) |
| LTC6992CDCB6-3-PBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:TimerBlox Voltage-Controlled Pulse Width Modulator (PWM) |
| LTC6992CDCB6-3-TRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:TimerBlox Voltage-Controlled Pulse Width Modulator (PWM) |
| LTC6992CDCB6-4-PBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:TimerBlox Voltage-Controlled Pulse Width Modulator (PWM) |
| LTC6992CDCB6-4-TRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:TimerBlox Voltage-Controlled Pulse Width Modulator (PWM) |
发布紧急采购，3分钟左右您将得到回复。