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参数资料
| 型号： | LTC6993MPS6-3#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 13/26页 |
| 文件大小： | 0K |
| 描述： | IC MULTIVIBRATOR MONO TSOT23-6 |
| 特色产品： | TimerBlox? |
| 标准包装： | 2,500 |
| 系列： | LTC®6993 |
| 逻辑类型： | 单稳态 |
| 独立电路： | 1 |
| 施密特触发器输入： | 无 |
| 传输延迟： | 11ns |
| 输出电流高，低： | 16mA，16mA |
| 电源电压： | 2.25 V ~ 5.5 V |
| 工作温度： | -55°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SOT-23-6 细型，TSOT-23-6 |
| 供应商设备封装： | TSOT-23-6 |
| 包装： | 带卷 (TR) |
LTC6993-1/LTC6993-2
LTC6993-3/LTC6993-4
20
69931234fb
Supply Bypassing and PCB Layout Guidelines
TheLTC6993isanaccuratemonostablemultivibratorwhen
used in the appropriate manner. The part is simple to use
and by following a few rules, the expected performance is
easily achieved. Adequate supply bypassing and proper
PCB layout are important to ensure this.
Figure 13 shows example PCB layouts for both the SOT-23
and DCB packages using 0603 sized passive components.
The layouts assume a two layer board with a ground plane
layer beneath and around the LTC6993. These layouts are
a guide and need not be followed exactly.
1. Connect the bypass capacitor, C1, directly to the V+ and
GND pins using a low inductance path. The connection
from C1 to the V+ pin is easily done directly on the top
layer. For the DCB package, C1’s connection to GND is
also simply done on the top layer. For the SOT-23, OUT
can be routed through the C1 pads to allow a good C1
GND connection. If the PCB design rules do not allow
that,C1’sGNDconnectioncanbeaccomplishedthrough
multiple vias to the ground plane. Multiple vias for both
the GND pin connection to the ground plane and the
C1 connection to the ground plane are recommended
to minimize the inductance. Capacitor C1 should be a
0.1F ceramic capacitor.
2. Place all passive components on the top side of the
board. This minimizes trace inductance.
3. Place RSET as close as possible to the SET pin and
make a direct, short connection. The SET pin is a cur-
rent summing node and currents injected into this pin
directlymodulatetheoutputpulsewidth.Havingashort
connection minimizes the exposure to signal pickup.
4. Connect RSET directly to the GND pin. Using a long path
or vias to the ground plane will not have a significant
affect on accuracy, but a direct, short connection is
recommended and easy to apply.
5. Use a ground trace to shield the SET pin. This provides
another layer of protection from radiated signals.
6. Place R1 and R2 close to the DIV pin. A direct, short
connection to the DIV pin minimizes the external signal
coupling.
69931234 F13
LTC6993
TRIG
GND
SET
OUT
V+
DIV
C1
0.1F
R1
R2
RSET
V+
DIV
SET
OUT
GND
TRIG
C1
R1
R2
V+
RSET
DCB PACKAGE
TRIG
GND
SET
OUT
V+
DIV
R2
V+
RSET
TSOT-23 PACKAGE
R1
C1
Figure 13. Supply Bypassing and PCB Layout
APPLICATIONS INFORMATION
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC6993MPS6-4#TRMPBF | 功能描述:IC MULTIVIBRATOR MONO TSOT23-6 RoHS:是 类别:集成电路 (IC) >> 逻辑 - 多频振荡器 系列:LTC®6993 标准包装:1 系列:4000B 逻辑类型:单稳态 独立电路:2 施密特触发器输入:无 传输延迟:100ns 输出电流高，低:8.8mA，8.8mA 电源电压:3 V ~ 15 V 工作温度:-55°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SOIC（0.154"，3.90mm 宽） 供应商设备封装:16-SOIC 包装:Digi-Reel® 其它名称:CD4538BCMXDKR |
| LTC6993MPS6-4#TRPBF | 功能描述:IC MULTIVIBRATOR MONO TSOT23-6 RoHS:是 类别:集成电路 (IC) >> 逻辑 - 多频振荡器 系列:LTC®6993 标准包装:1 系列:4000B 逻辑类型:单稳态 独立电路:2 施密特触发器输入:无 传输延迟:100ns 输出电流高，低:8.8mA，8.8mA 电源电压:3 V ~ 15 V 工作温度:-55°C ~ 125°C 安装类型:表面贴装 封装/外壳:16-SOIC（0.154"，3.90mm 宽） 供应商设备封装:16-SOIC 包装:Digi-Reel® 其它名称:CD4538BCMXDKR |
| LTC6994-1 | 制造商:LINER 制造商全称:Linear Technology 功能描述:TimerBlox: Delay Block/ Debouncer |
| LTC6994-2 | 制造商:LINER 制造商全称:Linear Technology 功能描述:TimerBlox: Delay Block/ Debouncer |
| LTC6994CDCB-1#PBF | 制造商:Linear Technology 功能描述:DELAY BLOCK/DEBOUNCER 5.5V DFN-6 制造商:Linear Technology 功能描述:DELAY BLOCK/DEBOUNCER, 5.5V, DFN-6 制造商:Linear Technology 功能描述:SC-Timing, Cut Tape Delay with Rising or Falling Edge Trigger 制造商:Linear Technology 功能描述:DELAY BLOCK/DEBOUNCER, 5.5V, DFN-6, Operating Mode:Monostable, Supply Voltage Min:2.25V, Supply Voltage Max:5.5V, Digital IC Case Style:DFN, No. of Pins:6, Operating Temperature Min:0C, Operating Temperature Max:70C , RoHS Compliant: Yes |
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