参数资料
型号: LTM4601AIY#PBF
厂商: Linear Technology
文件页数: 15/30页
文件大小: 0K
描述: IC DC/DC UMODULE 12A 133-BGA
标准包装: 119
系列: µModule®
类型: 非隔离(POL)
输出数: 1
电压 - 输入(最小): 4.5V
电压 - 输入(最大): 20V
Voltage - Output 1: 0.6 ~ 5 V
电流 - 输出(最大): 12A
特点: 带有 UVLO
安装类型: 表面贴装
封装/外壳: 133-BGA
尺寸/尺寸: 0.59" L x 0.59" W x 0.13" H(15.0mm x 15.0mm x 3.4mm)
包装: 托盘
工作温度: -40°C ~ 85°C
效率: 95%
配用: DC1041A-A-ND - BOARD EVAL LTM4601
LTM4601/LTM4601-1
APPLICATIONS INFORMATION
V UVLO =
R1 + R2
+ R SET
V OUT = 0.6V
Run Enable
The RUN pin is used to enable the power module. The
pin has an internal 5.1V Zener to ground. The pin can be
driven with a logic input not to exceed 5V.
The RUN pin can also be used as an undervoltage lock out
(UVLO) function by connecting a resistor divider from the
input supply to the RUN pin:
? 1.5V
R2
See Figure 1, Simplified Block Diagram.
Power Good
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a ±10% window around the regulation point and tracks
with margining.
COMP Pin
This pin is the external compensation pin. The module
has already been internally compensated for most output
voltages. Table 2 is provided for most application require-
ments. LTpowerCAD is available for other control loop
optimization.
PLLIN
The power module has a phase-locked loop comprised
of an internal voltage controlled oscillator and a phase
detector. This allows the internal top MOSFET turn-on
to be locked to the rising edge of an external clock. The
frequency range is ±30% around the operating frequency
of 850kHz. A pulse detection circuit is used to detect a
clock on the PLLIN pin to turn on the phase-locked loop.
The pulse width of the clock has to be at least 400ns and
at least 2V in amplitude. The PLLIN pin must be driven
from a low impedance source such as a logic gate located
close to the pin. During the start-up of the regulator, the
phase-locked loop function is disabled.
INTV CC and DRV CC Connection
An internal low dropout regulator produces an internal
5V supply that powers the control circuitry and DRV CC
for driving the internal power MOSFETs. Therefore, if
the system does not have a 5V power rail, the LTM4601
can be directly powered by V IN . The gate driver current
through the LDO is about 20mA. The internal LDO power
dissipation can be calculated as:
P LDO_LOSS = 20mA ? (V IN – 5V)
The LTM4601 also provides the external gate driver volt-
age pin DRV CC . If there is a 5V rail in the system, it is
recommended to connect DRV CC pin to the external 5V
rail. This is especially true for higher input voltages. Do
not apply more than 6V to the DRV CC pin. A 5V output can
be used to power the DRV CC pin with an external circuit
as shown in Figure 16.
Parallel Operation of the Module
The LTM4601 device is an inherently current mode con-
trolled device. Parallel modules will have very good current
sharing. This will balance the thermals on the design. The
voltage feedback equation changes with the variable N as
modules are paralleled:
60.4k
N
R SET
N is the number of paralleled modules.
Figure 19 shows an LTM4601 and an LTM4601-1 used in a
parallel design. The 2nd LTM4601 device does not require
the remote sense amplifier, therefore, the LTM4601-1 device
is used. An LTM4601 device can be used without the diff
amp. V OSNS+ can be tied to ground and the V OSNS– can be
tied to INTV CC . DIFFV OUT can float. When using multiple
LTM4601-1 devices in parallel with an LTM4601, limit the
number to five for a total of six modules in parallel.
For more information www.linear.com/LTM4601
4601fd
15
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