参数资料
型号: LTM4603IV#PBF
厂商: Linear Technology
文件页数: 7/26页
文件大小: 0K
描述: IC DC/DC UMODULE 6A 118-LGA
产品培训模块: Power Module vs. Discrete DC to DC
软件下载: LTM4603 Spice Models
产品目录绘图: LTM Series_15x15x2.8
设计资源: LTM4603IV#PBF Footprint.bxl
特色产品: μModule Products
标准包装: 119
系列: µModule®
类型: 非隔离(POL)
输出数: 1
电压 - 输入(最小): 4.5V
电压 - 输入(最大): 20V
Voltage - Output 1: 0.6 ~ 5 V
电流 - 输出(最大): 6A
安装类型: 表面贴装
封装/外壳: 118-LGA
尺寸/尺寸: 0.59" L x 0.59" W x 0.11" H(15.0mm x 15.0mm x 2.8mm)
包装: 托盘
工作温度: -40°C ~ 85°C
效率: 93%
产品目录页面: 2711 (CN2011-ZH PDF)
LTM4603/LTM4603-1
PIN FUNCTIONS (See Package Description for Pin Assignment)
V IN (Bank 1): Power Input Pins. Apply input voltage be-
tween these pins and PGND pins. Recommend placing
input decoupling capacitance directly between V IN pins
and PGND pins.
V OUT (Bank 3): Power Output Pins. Apply output load
between these pins and PGND pins. Recommend placing
output decoupling capacitance directly between these pins
and PGND pins. See Figure 15.
PGND (Bank 2): Power ground pins for both input and
output returns.
V OSNS– (Pin M12): (–) Input to the Remote Sense Ampli-
fier. This pin connects to the ground remote sense point.
The remote sense amplifier is used for V OUT ≤ 3.3V. Tie
to INTV CC if not used.
NC1 (Pin M12): No internal connection on the LTM4603-1.
V OSNS+ (Pin J12): (+) Input to the Remote Sense Ampli-
fier. This pin connects to the output remote sense point.
The remote sense amplifier is used for V OUT ≤ 3.3V. Tie
to ground if not used.
NC2 (Pin J12): No internal connection on the LTM4603-1.
DIFFV OUT (Pin K12): Output of the Remote Sense Ampli-
fier. This pin connects to the V OUT_LCL pin. Leave floating
if remote sense amplifier is not used.
NC3 (Pin K12): No internal connection on the LTM4603-1.
DRV CC (Pin E12): This pin normally connects to INTV CC
for powering the internal MOSFET drivers. This pin can
be biased up to 6V from an external supply with about
50mA capability, or an external circuit shown in Figure
16. This improves efficiency at the higher input voltages
by reducing power dissipation in the module.
INTV CC (Pin A7): This pin is for additional decoupling of
the 5V internal regulator.
PLLIN (Pin A8): External Clock Synchronization Input
to the Phase Detector. This pin is internally terminated
to SGND with a 50k resistor. Apply a clock with a high
level above 2V and below INTV CC . See the Applications
Information section.
TRACK/SS (Pin A9): Output Voltage Tracking and Soft-
Start Pin. When the module is configured as a master
output, then a soft-start capacitor is placed on this pin
to ground to control the master ramp rate. A soft-start
capacitor can be used for soft-start turn on as a stand
alone regulator. Slave operation is performed by putting
a resistor divider from the master output to ground, and
connecting the center point of the divider to this pin. See
the Applications Information section.
MPGM (Pin A12): Programmable Margining Input. A re-
sistor from this pin to ground sets a current that is equal
to 1.18V/R. This current multiplied by 10k W will equal a
value in millivolts that is a percentage of the 0.6V refer-
ence voltage. See Applications Information. To parallel
LTM4603s, each requires an individual MPGM resistor.
Do not tie MPGM pins together.
TOP VIEW
V IN
BANK 1
PGND
BANK 2
A
B
C
D
E
F
G
f SET
MARG0
MARG1
DRV CC
V FB
PGOOD
H
J
V OUT K
BANK 3 L
M
1 2 3 4 5 6 7 8 9 10 11 12
SGND
V OSNS+ (NC2, LTM4603-1)
DIFFV OUT (NC3, LTM4603-1)
V OUT_LCL
V OSNS– (NC1, LTM4603-1)
4603fb
7
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