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参数资料
| 型号： | LUCW3000CCN |
| 元件分类： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 2200 MHz, PDSO14 |
| 封装： | TSSOP-14 |
| 文件页数： | 6/28页 |
| 文件大小： | 326K |
| 代理商： | LUCW3000CCN |
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Advance Data Sheet
W3000 PLL Dual-Band Frequency Synthesizer
December 1999
Lucent Technologies Inc.
14
REF Register (continued)
Table 15. ERES: External Resistor Setting for Charge Pump Current (Bit 21)
ERES
External Resistor Status
0
Use internal charge pump current setting (not tested in production)
1
Use external resistor to set charge pump current (recommended)
If bit 21 is set to 0, the W3000 uses its internal current source to set the charge pump currents, with the values
shown in Table 12. If bit 21 is set to 1, the charge pump current is set by an external resistor between pin 9
(RES) and VDDC. In this case, the charge pump current is given by the following formula:
REF
DDC
SET
CP
R
*
A
100
05
.
1
V
*
I
=
where
ICP
= Nominal charge pump current.
ISET
= Current setting as in Table 12.
RREF = Value of external current reference resistor. See Table 3 for appropriate value.
A tight-tolerance RREF resistor is recommended.
Table 16. EN1: Synthesizer Enable (Bit 22)
PWRDN
(Input Pin 11)
EN1
Mode
High
0
Powerdown
High
1
Enable
Low
0
Powerdown
Low
1
Powerdown
The MAIN register also contains an enable bit, EN2. The W3000 is enabled and powered down with either the
REF or the MAIN register, whichever was programmed more recently. The contents of the MAIN and REF
registers are maintained in powerdown mode, providing supply voltages are maintained.
Table 17. LD: Lock Detect Enable (Bit 23)
LD (Bit 23)
Mode
PLL Condition
Output Level on Pin 8 LockDet
0
Disabled
Locked
High
0
Disabled
Unlocked
High
1
Enabled
Locked
High
1
Enabled
Unlocked
Low
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