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参数资料
| 型号： | LV5217GP-TE-L-E |
| 厂商： | ON Semiconductor |
| 文件页数： | 10/12页 |
| 文件大小： | 0K |
| 描述： | IC LED DVR 3CH CELL PHONE VCT16 |
| 标准包装： | 2,000 |
| 输出数： | 3 |
| 内部驱动器： | 是 |
| 类型 - 主要： | 通用 |
| 类型 - 次要： | 颜色，RGB |
| 频率： | 0Hz ~ 400kHz |
| 电源电压： | 1.6 V ~ 4.5 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WFQFN |
| 供应商设备封装： | 16-VCT（2.6x2.6） |
| 包装： | 带卷 (TR) |
| 工作温度： | -30°C ~ 75°C |
LV5217GP
Serial Bus Communication Specifications
I 2 C serial transfer timing conditions
twH
SCL
SDA
twL
th2
th1
tbuf
th1
Start condition
ts2
ton
tof
ts1
Resend start condition
ts3
Stop condition
Input waveform condition
Standard mode
Parameter
SCL clock frequency
symbol
fscl
SCL clock frequency
Conditions
min
0
typ
max
100
unit
kHz
Data setup time
Data hold time
Pulse width
Input waveform conditions
Bus free time
ts1
ts2
ts3
th1
th2
twL
twH
ton
tof
tbuf
The SCL setup time from the SDA rising edge
The SDA setup time from the SCL rising edge
The SCL setup time from the SDA rising edge
The SCL hold time from the SDA falling edge
The SDA hold time from the SCL falling edge
SCL low period pulse width
SCL high period pulse width
SCL, SDA (input) rising time
SCL, SDA (input) falling time
Time between STOP and TART conditions
4.7
250
4.0
4.0
0
4.7
4.0
4.7
1000
300
μ s
ns
μ s
μ s
μ s
μ s
μ s
ns
ns
μ s
High-speed mode
Parameter
SCL clock frequency
Symbol
fscl
SCL clock frequency
Conditions
min
0
typ
max
400
unit
kHz
Data setup time
Data hold time
Pulse width
Input waveform conditions
Bus free time
ts1
ts2
ts3
th1
th2
twL
twH
ton
tof
tbuf
The SCL setup time from the SDA rising edge
The SDA setup time from the SCL rising edge
The SCL setup time from the SDA rising edge
The SCL hold time from the SDA falling edge
The SDA hold time from the SCL falling edge
SCL low period pulse width
SCL high period pulse width
SCL, SDA (input) rising time
SCL, SDA (input) falling time
Time between STOP condition and TART condition
0.6
100
0.6
0.6
0
1.3
0.6
1.3
300
300
μ s
ns
μ s
μ s
μ s
μ s
μ s
ns
ns
μ s
No.A0833-10/12
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