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参数资料
| 型号： | LV56801P |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PZFM15 |
| 封装： | HZIP-15 |
| 文件页数： | 5/12页 |
| 文件大小： | 230K |
| 代理商： | LV56801P |
LV56801P
No.A1901-2/12
Specifications
Absolute Maximum Ratings
at Ta = 25
°C
Parameter
Conditions
Ratings
Unit
Supply voltage
VCC max
36
V
Peak supply voltage
VCC peak
See below for the waveform applied.
50
V
Independent IC
1.5
W
Al heat sink *
5.6
W
Allowable Power dissipation
Pd max
With an infinity heat sink
Ta
≤ 25°C
32.5
W
Junction temperature
Tj max
150
°C
Operating ambient temperature
Topr
-40 to +85
°C
Storage temperature
Tstg
-55 to +150
°C
* : When the Aluminum heat sink (50mm
× 50mm × 1.5mm) is used
Allowable Operating range
at Ta = 25
°C
Parameter
Conditions
Ratings
Unit
Operating supply voltage 1
VDD output, SW output, ACC output
7.5 to 16
V
ILM output at 10V
12 to 16
V
Operating supply voltage 2
ILM output at 8V
10 to 16
V
Operating supply voltage 3
Audio output at 9V
10 to 16
V
CD output (CD output current = 1.3A)
10.5 to 16
V
Operating supply voltage 4
CD output (CD output current
≤ 1A)
10 to 16
V
Electrical Characteristics
at Ta = 25°C, VCC = 14.4V
*: All the specifications are defined based on the tests that Tj is almost equal to Ta (=25
°C). To suppress the rise of Tj in the junction
temperature as much as possible, it tests by the pulse loading.
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
Current drain
ICC
VDD no load, CTRL1/2 = L/L, ACC = 0V
400
800
μA
CTRL1 Input
Low input voltage
VIL1
0
0.5
V
M1 input voltage
VIM11
0.8
1.1
1.4
V
M2 input voltage
VIM21
1.9
2.2
2.5
V
High input voltage
VIH1
2.9
3.3
5.5
V
Input impedance
RIH1
350
500
650
k
Ω
CTRL2 Input
Low input voltage
VIL2
0
0.5
V
M input voltage
VIM2
1.1
1.65
2.1
V
High input voltage
VIH2
2.5
3.3
5.5
V
Input impedance
RIH2
350
500
650
k
Ω
VDD 3.3V Output *1
The VDD 3.3V output supplies the output currents of SW 3.3V and ACC 3.3V.
Output voltage 1
VO1
IO1 = 200mA, IO7, IO8 = 0A
3.13
3.3
3.47
V
Output voltage 2
VO1’
IO1 = 200mA, IO7 = 200mA, IO8 = 100mA
3.13
3.3
3.47
V
Output total current
Ito1
VO1 ≥ 3.13V, Ito1 = IO1+IO7+IO8
500
mA
Line regulation
ΔVOLN1
7.5V
< VCC < 16V, IO1 = 200mA *2
30
90
mV
Load regulation
ΔVOLD1
1mA
< IO1 < 200mA *2
70
150
mV
Dropout voltage 1
VDROP1
IO1 = 200mA *2
1.0
1.5
V
Dropout voltage 2
VDROP1’
IO1 = 100mA *2
0.7
1.05
V
Dropout voltage 3
VDROP1”
IO1+IO7+IO8 = 500mA
2.5
3.75
V
Ripple rejection
RREJ1
f = 120Hz, IO1 = 200mA *2
40
50
dB
CD Output ; CTRL2 =
H
Output voltage
VO2
IO2 = 1000mA
7.6
8.0
8.4
V
*1 : The VDD 3.3V output also supplies the output currents of SW 3.3V and ACC 3.3V. Therefore, the current supply capability of the VDD 3.3V output and its
other electrical characteristics are affected by the output statuses of SW 3.3V and ACC 3.3V.
*2 : SW 3.3V and ACC 3.3V are not subject to a load.
Continued on next page.
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