参数资料
型号: LV8105W
元件分类: 运动控制电子
英文描述: BRUSHLESS DC MOTOR CONTROLLER, 0.02 A, PQFP48
封装: 7 X 7 MM, QFP-48
文件页数: 9/21页
文件大小: 202K
代理商: LV8105W
LV8105W
No.A1271-17/21
Description of LV8105W
1. Speed control circuit
This IC controls the speed with a combination of the speed discriminator circuit and the PLL circuit. Therefore, when a
motor that has large load variation is used, it is possible to prevent the rotation variation as compared with the speed
control method only the speed discriminator. The speed discriminator circuit and the PLL circuit outputs an error signal
once every one FG period. The FG servo frequency signal (fFG) is controlled to have the equal frequency with the
clock signal (fCLK) which is input through the CLK pin.
fFG = fCLK
2. VCO circuit
This IC has the VCO circuit to generate the reference signal of the speed discriminator circuit. The reference signal
frequency is calculated as follows.
fVCO = fCLK × 512
fVCO : Reference signal frequency, fCLK : Clock signal frequency
The components connected to the R, C and FIL pins must be connected to the GND1 pin (pin 45) with a line that is as
short as possible to reduce influence of noise.
3. Output drive circuit
This IC adopts a direct PWM drive method to reduce power loss in the output. An external output transistor is always
saturated while the transistor is on and driving force of the motor is adjusted by changing the duty that the output
transistor is on. The waveform of the coil current becomes trapezoidal with the current control and the overlap
switching of about 15 degrees. Therefore, it is possible to reduce the motor noise and the torque ripple when switching
the phase to which power is applied (Soft current-carrying).
When the 120 degrees current-carrying, the PWM switching is performed on the UL, VL and WL pins only. Also,
when the soft current-carrying, the PWM switching is performed on any the outputs (the UL, VL, WL, UH, VH and
WH pins). The PWM frequency is determined with 64kHz (typical) in the IC.
When the PWM switching of the upper side output is off, the lower side output is turned on. Also, when the PWM
switching of the lower side output is off, the upper side output is turned on (Synchronous rectification). The off-time of
the synchronous rectification is determined in the IC and varies from 1.2
s to 3.1s.
4. Current limiter circuit
The current limiter circuit limits the (peak) current at the value I = VRF/Rf (VRF = 0.25V (typical), Rf : current
detection resistor). The current limitation operation consists of reducing the PWM output on-duty to suppress the
current.
High accuracy detection can be achieved by connecting the RF and RFGND pins lines near at the ends of the current
detection resistor (Rf).
5. Speed lock range
The speed lock range is less than
±6.25% of the fixes speed. When the motor speed is in the lock range, the LD pin (an
open collector output) goes low. If the motor speed goes out of the lock range, the on-duty of the motor drive output is
adjusted according to the speed error to control the motor speed to be within the lock range.
As for the 120 degrees current-carrying and the soft current-carrying, when the motor speed goes out of the lock range,
the current-carrying becomes the 120 degrees current-carrying. When the motor speed is within the lock range, the
current-carrying becomes the soft current-carrying.
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