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参数资料
| 型号： | LV8845DVE212.5M |
| 厂商： | PLETRONICS INC |
| 元件分类： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 212.5 MHz, LVDS OUTPUT |
| 封装： | LEAD FREE, LEADLESS PACKAGE-6 |
| 文件页数： | 1/4页 |
| 文件大小： | 65K |
| 代理商： | LV8845DVE212.5M |
LV8845D LVDS Series
6 Pad 7 x 5mm Leadless Surface Mount Oscillator
Consult factory for specific frequencies
106.25 MHz and 212.5 MHz typically stock, other frequencies available
Low Voltage Differential Signal Output with Enable / Disable
Standard Specifications
Overall Frequency Stability
± 50 PPM, ± 25 PPM and ± 20 PPM over Operating Temp. Range
Operating Temperature Range
0 to +80°C is standard, can be extended to - 40 to +85°C
Operable Supply Voltage (Vcc) 3.3 V ± 5%
Part Numbering Guide
1.43 V typical and 1.60 V maximum with output enabled (100 ohm load, R1 = 50 ohms) See Test circuit #6
0.90 V minimum and 1.10 V typical with output enabled (same conditions as above)
High Level Output Voltage
Low Level Output Voltage
Consult factory for available frequencies and specs. Not all options available for all frequencies. A special part number may be assigned.
Frequency Stability is inclusive of frequency shifts due to calibration, temperature, supply voltage, shock, vibration and load
(425) 776 -1880, Fax: (425) 776-2760, ple-sales@pletronics.com, www.pletronics.com
TBD
Pl tronics, Inc.
Model
Frequency Stability
45 = ± 50 PPM
44 = ± 25 PPM
Frequency in MHz
Special Specifications (choose all that apply)
E: Extended Operating Temp Range (-40 to +85°C) ,Optional
V: Supply Voltage of 3.3 volts ±5% (Required)
LV88 45 D V - 106.25M - XXX (Internal Code or blank)
20 = ± 20 PPM
Output Leakage Current
100 uA maximum with output disabled
Offset Voltage
Differential Output Voltage
247 mV minimum, 330 mV typical and 454 mV maximum with output enabled (same conditions as above)
Differential Output Error
50 mV maximum with output enabled (same conditions as above)
1.125 V minimum, 1.25 V typical and 1.375 V maximum with output enabled (same as above)
Offset Voltage Error
50 mV maximum with output enabled (same as above)
70 mA maximum
Supply Current (Icc)
Symmetry (DC1)
2.0 V minimum at Enable / Disable Pin
0.8 V maximum at Enable / Disable Pin
High Level Input Voltage
Low Level Input Voltage
Output Enable Time
200 nS maximum
High Level Input Current
Low Level Input Current
±10 uA maximum at Enable / Disable
±50 uA maximum at Enable / Disable
200 nS maximum
Output Disable Time
RMS Jitter
Enable / Disable Pin:
1.0 pS max at12 kHz to 20 MHz from the output
Start Time
5.0 mS maximum
Rise and Fall Time (Tr & Tf)
47/53% measured at crossing point
Symmetry (DC2)
47/53% measured at 50% of output swing
1.5 nS max at 20% to 80% output swing (100 ohm load) See Test circuit #6 and Waveform #2
Packaging
Tube or
16mm tape
8mm pitch
Pl tronics, Inc.
19013 36th Ave. W, Suite H Lynnwood, WA 98036 USA
Manufacturer of High Quality Frequency Control Products
.
Portions of the part number that appear after the frequency may not be marked on part (C of C provided)
July 2004
The Enable / Disable pin has an internal pull up and if the pin is not connected the oscilaltor is enabled. Pletronics strongly recommends
connecting the Enable / Disable pin to Vcc, if the oscillator is to be enabled at all times. In the disable condition, the output becomes a
high impedance and the internal oscillator circuit is inhibited (the internal circuit is stopped).
PECL,
LVDS,
OCXO
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