- 您现在的位置：买卖IC网 > PDF目录11209 > LX128EV-5FN208C (Lattice Semiconductor Corporation)IC SWITCH DIGITAL 208FPBGA PDF资料下载
参数资料
| 型号： | LX128EV-5FN208C |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 7/9页 |
| 文件大小： | 0K |
| 描述： | IC SWITCH DIGITAL 208FPBGA |
| 标准包装： | 90 |
| 功能： | 开关 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 208-BGA |
| 供应商设备封装： | 208-FPBGA（17x17） |
| 包装： | 托盘 |
Lattice Semiconductor
ispGDX2 Family Data Sheet
4
MUX and Register Block (MRB)
Every MRB Block has a 4:1 MUX (I/O MUX) and a set of three registers which are connected to the I/O buffers,
FIFO and sysHSI Blocks. Multiple MRBs can be combined to form large multiplexers as described below. Figure 3
shows the structure of the MRB.
Each of the three registers in the MRB can be congured as edge-triggered D-type ip-op or as a level sensitive
latch. One register operates on the input data, the other output data and the last register synchronizes the output
enable function. The input and output data signals can bypass each of their registers. The polarity of the data out
and output enable signals can be selected.
The Output and OE register share the same clock and clock enable signals. The Input register has a separate clock
and clock enable. The initialization signals of each register can be independently congured as Set or Reset. These
registers have programmable polarity control for Clock, Clock Enable and Set/Reset. The output enable register
input can be set either by one of the two output enables generated locally from the Control Array or from one of the
four (two in 64 I/O) Global OE enable pins. In addition to the local clock and clock enable signals, each MRB has
access to Global Clock, Clock Enable, Reset and TOE nets.
SELECT
DEVICES
DISCONTINUED
相关PDF资料 |
PDF描述 |
|---|---|
| ADN4600ACPZ-R7 | IC CROSSPOINT SWITCH 8X8 64LFCSP |
| AD7501KN | IC MULTIPLEXER 8X1 16DIP |
| AD7511DIJN | IC SWITCH QUAD SPST 16DIP |
| AD7501KNZ | IC MULTIPLEXER 8X1 16DIP |
| SY89540UMY | IC XPOINT SW 4X4 PREC 44-MLF |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LX128EV-5FN208I | 功能描述:模拟和数字交叉点 IC 128 I/O SW Matrix 3.3V, 5ns E-series RoHS:否 制造商:Micrel 配置:2 x 2 封装 / 箱体:MLF-16 数据速率:10.7 Gbps 输入电平:CML, LVDS, LVPECL 输出电平:CML 电源电压-最大:3.6 V 电源电压-最小:2.375 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 产品:Digital Crosspoint 封装:Tube |
| LX128EVCF1003 | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:High Performance Interfacing and Switching |
| LX128EVCF10032 | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:High Performance Interfacing and Switching |
| LX128EVCF10035 | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:High Performance Interfacing and Switching |
| LX128EVCF1005 | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:High Performance Interfacing and Switching |
发布紧急采购，3分钟左右您将得到回复。