参数资料
型号: LX1431IDM-TR
厂商: MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP
元件分类: 基准电压源/电流源
英文描述: 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 2.5 V, PDSO8
封装: LEAD FREE, PLASTIC, SOIC-8
文件页数: 4/7页
文件大小: 237K
代理商: LX1431IDM-TR
P ROGRAMMABLE R EFERENCE
LX1431
PRODUCT DA T ABOOK 1996/1997
Copyright 1997
Rev. 1.2a 8/04
4
P RODUCTION D ATA S HEET
APPLICA TION INFORMA TION
PIN FUNCTIONS
Pin 1 COLL: Open collector of the output transistor. The
maximum pin voltage is 36V. The saturation voltage at 100mA
is approximately 1V.
Pin 2 COMP: Base of the driver for the output transistor. This
pin allows additional compensation for complex feedback
systems and shutdown of the regulator. It must be left open if
unused.
Pin 3 V+:
Bias voltage for the entire shunt regulator. The
maximum input voltage is 36V and the minimum to operate is
equal to V
REF (2.5V).
The quiescent current is typically 0.6mA.
Pin 4 R
TOP: Top of the on-chip 5k-5k resistive divider that
guarantees 1% accuracy of operation as a 5V shunt regulator
with no external trim. The pin is tied to COLL for self-
contained 5V operation. It may be left open if unused.
Pin 5 GND-S: Ground reference for the on-chip resistive
divider and shunt regulator circuitry except for the output
transistor. This pin allows external current limit of the output
transistor with one resistor between GND-F (force) and GND-S
(sense).
Pin 6 GND-F: Emitter of the output transistor and substrate
connection for the die.
Pin 7 R
MID: Middle of the on-chip resistive divider string
between R
TOP and GND-S.
The pin is tied to REF for self-
contained 5V operation. It may be left open if unused.
Pin 8 REF: Control pin of the shunt regulator with a 2.5V
threshold.
COMP, R
TOP, RMID, and REF have static discharge protection
circuits that must not be activated on a continuous basis.
Therefore, the absolute maximum DC voltage on these pins is
6V, well beyond the normal operating conditions.
As with all bipolar ICs, the LX1431 contains parasitic diodes
which must not be forward biased or else anomalous behavior
will result. Pin conditions to be avoided are RTOP below
RMID in voltage and any pin below GND-F in voltage (except
for GND-S).
FREQUENCY COMPENSATION
Excess capacitance on the REF pin can introduce enough
phase shift to induce oscillation when configured as a refer-
ence >2.5V. This can be compensated with capacitance
between COLL and REF (phase lead). More complicated
feedback loops may require shaping of the frequency response
of the LX1431 with dominant pole or pole-zero compensation.
This can be accomplished with a capacitor or series resistor
and capacitor between COLL and COMP.
The compensation schemes mentioned above use voltage
feedback to stabilize the circuits. There must be voltage gain
at the COLL pin for them to be effective, so the COLL pin must
see a reasonable AC impedance. Capacitive loading of the
COLL pin reduces the AC impedance, voltage gain, and
frequency response, thereby decreasing the effectiveness of
the compensation schemes, but also decreasing their necessity.
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