参数资料
型号: LX8386A-00CDD
厂商: MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP
元件分类: 基准电压源/电流源
英文描述: CONNECTOR ACCESSORY
中文描述: 1.2 V-8 V ADJUSTABLE POSITIVE LDO REGULATOR, 1.3 V DROPOUT, PSSO3
封装: PLASTIC, TO-263, 3 PIN
文件页数: 2/7页
文件大小: 223K
代理商: LX8386A-00CDD
1.5A L
OW
D
ROPOUT
P
OSITIVE
R
E G U L AT O R S
LX8386-xx/8386A-xx/8386B-xx
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
Copyright 1999
Rev. 1.7a 10/00
2
P
R O D U C T I O N
D
A T A
S
H E E T
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Power Dissipation ..................................................................................Internally Limited
Input Voltage................................................................................................................ 10V
Input to Output Voltage Differential........................................................................... 10V
Maximum Output Current .......................................................................................... 1.5A
Operating Junction Temperature
Plastic (P, DD & DT Packages) ............................................................................ 150°C
Storage Temperature Range ...................................................................... -65°C to 150°C
Lead Temperature (Soldering, 10 seconds)............................................................. 300°C
PACKAGE PIN OUTS
P PACKAGE
(Top View)
* Pin 1 is GND for fixed voltage versions.
DD PACKAGE
(Top View)
* Pin 1 is GND for fixed voltage versions.
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with
respect to Ground. Currents are positive into, negative out of the specified terminal.
P PACKAGE:
THERMAL RESISTANCE-JUNCTION TO TAB,
θ
JT
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
DD PACKAGE:
THERMAL RESISTANCE-JUNCTION TO TAB,
θ
JT
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
DT PACKAGE:
THERMAL RESISTANCE-JUNCTION TO TAB,
θ
JT
THERMAL RESISTANCE-JUNCTION TO AMBIENT,
θ
JA
3.0°C/W
60°C/W
3.0°C/W
*60°C/W
9°C/W
*80°C/W
Junction Temperature Calculation: T
= T
+ (P
x
θ
).
The
θ
numbers are guidelines for the thermal performance of the device/pc-board system. All
of the above assume no ambient airflow.
*
θ
can be improved with package soldered to 0.5IN
2
copper area over backside ground
plane or internal power plane.
θ
JA
can vary from 20oC/W to > 40oC/W depending on
mounting technique.
THERMAL DATA
BLOCK DIAGRAM
Thermal
Limit Circuit
Control
Circuit
Bandgap
Circuit
Output
Circuit
Bias
Circuit
V
OUT
V
IN
SOA Protection
Circuit
Current
Limit Circuit
ADJ or
GND*
3
2
1
3
2
1
TAB IS V
OUT
TAB IS V
OUT
* This pin GND for fixed voltage versions.
3.
V
IN
2.
V
OUT
1.
ADJ / GND*
DT PACKAGE (D-Pak)
(Top View)
* Pin 1 is GND for fixed voltage versions.
TAB IS V
OUT
V
IN
V
OUT
ADJ / GND*
V
IN
V
ADJ / GND*
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