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参数资料
| 型号： | M-88L70-01P |
| 厂商： | CLARE INC |
| 元件分类： | 信令电路 |
| 英文描述： | 3V DTMF Receiver |
| 中文描述： | TELECOM, DTMF SIGNALING CIRCUIT, PDIP18 |
| 封装： | PLASTIC, DIP-18 |
| 文件页数： | 5/8页 |
| 文件大小： | 290K |
| 代理商： | M-88L70-01P |
M-88L70
www.clare.com
5
Rev. 1
Table 5 Operating Characteristics - Gain Setting Amplifier
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
TEST CONDITIONS
Input leakage current
I
N
-
100
-
nA
V
SS < VIN < VDD
Input resistance
R
IN
-10
-
M
Input offset voltage
V
OS
-15
25
mV
Power supply rejection
PSRR
50
60
-
dB
1 kHz
Common mode rejection
CMRR
40
60
-
dB
-3.0V < V
IN < 3.0V
DC open loop voltage gain
A
VOL
32
65
-
dB
Open loop unity gain bandwidth
f
C
0.3
1.0
-
MHz
Output voltage swing
V
O
-
2.2
-
V
P-P
RL 3 100 k
to V
SS
Tolerable capacitive load (GS)
C
L
-
100
pF
Tolerable resistive load (GS)
R
L
50
-
k
Common mode range
V
CM
-
1.5
-
V
P-P
No load
All voltages referenced to V
SS unless otherwise noted. VDD = 3.0 V +20%/-10%, VSS = 0 V, TA = -40C to + +85C
Table 6 AC Characteristics
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Valid input signal levels
-
-36
-
-6.4
dBm
1,2,3,4,5,8
(each tone of composite signal)
-
12.3
-
370
mVRMS
Positive twist accept
-
6
dB
Negative twist accept
-
6
dB
Frequency deviation accept limit
-
1.5% ±2 Hz
Nom.
2,3,5,8,10
Frequency deviation reject limit
-
±3.5%
-
Nom.
2,3,5
Third tone tolerance
-
-16
-
dB
2,3,4,5,8,9,13,14
Noise tolerance
-
-12
-
dB
2,3,4,5,6,8,9
Dial tone tolerance
-
+22
-
dB
2,3,4,5,7,8,9
Tone present detection time
t
DP
5
8
14
ms
See Figure 8
Tone absent detection time
t
DA
0.5
3
8.5
ms
Minimum tone duration accept
t
REC
-
40
ms
User adjustable (see Figures 3
Maximum tone duration reject
t
REC
20
-
ms
and Figure 5)
Minimum interdigit pause accept
t
ID
--
40
ms
Maximum interdigit pause reject
t
DO
20
-
ms
Propagation delay (St to Q)
t
PQ
-13
-
s
OE = V
DD
Propagation delay (St to StD)
t
PStD
-8
-
s
Output data setup (Q to StD)
t
QStD
-
3.4
-
s
Propagation delay (OE to Q), enable
t
PTE
-
200
-
ns
R
L = 10k, CL = 50 pF
Propagation delay (OE to Q), disable
t
PTD
-
500
-
ns
Crystal clock frequency
f
CLK
3.5759
3.5795
3.5831
MHz
Clock output (OSC2), capacitive load
C
LO
--
30
pF
All voltages referenced to VSS unless otherwise noted. For typical values V
DD = 3.0 V, VSS = 0 V, TA = -40C to +85C, fCLK = 3.579545 MHz.
Notes:
1. dBm = decibels above or below a reference power of 1 mW into a 600
load.
2. Digit sequence consists of all 16 DTMF tones.
3. Tone duration = 40 ms. Tone pause = 40 ms.
4. Nominal DTMF frequencies are used, measured at GS.
5. Both tones in the composite signal have an equal amplitude.
6. Bandwidth limited (0 to 3 kHz) Gaussian noise.
7. The precise dial tone frequencies are (350 and 440 Hz) ± 2%.
8. For an error rate of better than 1 in 10,000.
9. Referenced to lowest level frequency component in DTMF signal.
10. Minimum signal acceptance level is measured with specified maximum frequency deviation.
11. Input pins defined as IN+, IN-, and OE.
12. External voltage source used to bias VREF.
13. This parameter also applies to a third tone injected onto the power supply.
14. Referenced to Figure 4. Input DTMF tone level at -28 dBm.
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