参数资料
型号: M1A3PE3000-2PQ208
厂商: Microsemi SoC
文件页数: 59/162页
文件大小: 0K
描述: IC FPGA 1KB FLASH 3M 208-PQFP
标准包装: 24
系列: ProASIC3E
RAM 位总计: 516096
输入/输出数: 147
门数: 3000000
电源电压: 1.425 V ~ 1.575 V
安装类型: 表面贴装
工作温度: 0°C ~ 70°C
封装/外壳: 208-BFQFP
供应商设备封装: 208-PQFP(28x28)
Revision 13
5-1
5 – Datasheet Information
List of Changes
The following table lists critical changes that were made in each revision of the ProASIC3E datasheet.
Revision
Changes
Page
Revision 13
(January 2013)
(CCC) and PLL Wide Input Frequency Range from ’1.5 MHz to 200 MHz’ to
’1.5MHz to 350 MHz’ based on Table 2-98 ProASIC3E CCC/PLL Specification
(SAR 22196).
The "ProASIC3E Ordering Information" section has been updated to mention "Y"
as "Blank" mentioning "Device Does Not Include License to Implement IP Based
on the Cryptography Research, Inc. (CRI) Patent Portfolio" (SAR 43220).
The programming temperature range supported is Tambient = 0°C to 85°C.
The note in Table 2-98 ProASIC3E CCC/PLL Specification referring the reader
to SmartGen was revised to refer instead to the online help associated with the
core (SAR 42571).
Libero Integrated Design Environment (IDE) was changed to Libero System-on-
Chip (SoC) throughout the document (SAR 40285).
Live at Power-Up (LAPU) has been replaced with ’Instant On’.
NA
Revision 12
(September 2012)
The "Security" section was modified to clarify that Microsemi does not support
read-back of programmed data.
Revision 11
(August 2012)
Added a Note stating "VMV pins must be connected to the corresponding VCCI pins.
information.
The drive strength, IOL, and IOH value for 3.3 V GTL and 2.5 V GTL was
changed from 25 mA to 20 mA in the following tables (SAR 31924):
Also added note stating "Output drive strength is below JEDEC specification." for
Tables 2-17 and 2-19.
Additionally, the IOL and IOH values for 3.3 V GTL+ and 2.5 V GTL+ were
corrected from 51 to 35 (for 3.3 V GTL+) and from 40 to 33 (for 2.5 V GTL+) in
table Table 2-13 (SAR 39714).
the maximum temperature from 110°C to 100°C, with an example of six months
instead of three months (SAR 37934).
The following sentence was deleted from the "2.5 V LVCMOS" section (SAR
34796):
"It uses a 5 V–tolerant input buffer and push-pull output buffer." This change was
made in revision 10 and omitted from the change table in error.
相关PDF资料
PDF描述
EMC60DRYH CONN EDGECARD 120POS .100 EXTEND
EP4CE75F29I8L IC CYCLONE IV FPGA 75K 780FBGA
EP4CE75F29I7 IC CYCLONE IV FPGA 75K 780FBGA
M1AFS1500-2FGG676 IC FPGA 8MB FLASH 1.5M 676-FBGA
ACB80DHRR CONN CARD EXTEND 160POS .050"
相关代理商/技术参数
参数描述
M1A3PE3000-2PQ208I 功能描述:IC FPGA 1KB FLASH 3M 208-PQFP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA(现场可编程门阵列) 系列:ProASIC3E 标准包装:1 系列:ProASICPLUS LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:129024 输入/输出数:248 门数:600000 电源电压:2.3 V ~ 2.7 V 安装类型:表面贴装 工作温度:- 封装/外壳:352-BFCQFP,带拉杆 供应商设备封装:352-CQFP(75x75)
M1A3PE3000-2PQ896 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
M1A3PE3000-2PQ896ES 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
M1A3PE3000-2PQ896I 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
M1A3PE3000-2PQ896PP 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs