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参数资料
| 型号： | M25P16-VME3G |
| 厂商： | 意法半导体 |
| 元件分类： | DRAM |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | 4兆位统一部门，串行闪存 |
| 文件页数： | 32/55页 |
| 文件大小： | 335K |
| 代理商： | M25P16-VME3G |
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Instructions
M25P16
32/55
6.11
Deep Power-down (DP)
Executing the Deep Power-down (DP) instruction is the only way to put the device in the
lowest consumption mode (the Deep Power-down mode). It can also be used as a software
protection mechanism, while the device is not in active use, as in this mode, the device
ignores all Write, Program and Erase instructions.
Driving Chip Select (S) High deselects the device, and puts the device in the Standby mode
(if there is no internal cycle currently in progress). But this mode is not the Deep Power-
down mode. The Deep Power-down mode can only be entered by executing the Deep
Power-down (DP) instruction, subsequently reducing the standby current (from I
CC1
to I
CC2
,
as specified in
Table 14
).
To take the device out of Deep Power-down mode, the Release from Deep Power-down and
Read Electronic Signature (RES) instruction must be issued. No other instruction must be
issued while the device is in Deep Power-down mode.
The Release from Deep Power-down and Read Electronic Signature (RES) instruction also
allows the Electronic Signature of the device to be output on Serial Data Output (Q).
The Deep Power-down mode automatically stops at Power-down, and the device always
Powers-up in the Standby mode.
The Deep Power-down (DP) instruction is entered by driving Chip Select (S) Low, followed
by the instruction code on Serial Data Input (D). Chip Select (S) must be driven Low for the
entire duration of the sequence.
The instruction sequence is shown in
Figure 18
.
Chip Select (S) must be driven High after the eighth bit of the instruction code has been
latched in, otherwise the Deep Power-down (DP) instruction is not executed. As soon as
Chip Select (S) is driven High, it requires a delay of t
DP
before the supply current is reduced
to I
CC2
and the Deep Power-down mode is entered.
Any Deep Power-down (DP) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
Figure 18.
Deep Power-down (DP) instruction sequence
C
D
AI03753D
S
2
1
3
4
5
6
7
0
t
DP
Deep Power-down Mode
Stand-by Mode
Instruction
相关PDF资料 |
PDF描述 |
|---|---|
| M25P16-VME3P | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P16-VME3TG | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P16-VME3TP | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P16-VMF3G | 4 Mbit Uniform Sector, Serial Flash Memory |
| M25P16-VMF3P | 4 Mbit Uniform Sector, Serial Flash Memory |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M25P16VME3P | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface |
| M25P16-VME3P | 制造商:NUMONYX 制造商全称:Numonyx B.V 功能描述:16 Mbit, serial Flash memory, 75 MHz SPI bus interface |
| M25P16VME3T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface |
| M25P16-VME3T | 制造商:NUMONYX 制造商全称:Numonyx B.V 功能描述:16 Mbit, serial Flash memory, 75 MHz SPI bus interface |
| M25P16VME3TG | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:512 Kbit to 32 Mbit, Low Voltage, Serial Flash Memory With 40 MHz or 50 MHz SPI Bus Interface |
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