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参数资料
| 型号： | M28C17-120P6T |
| 厂商： | 意法半导体 |
| 元件分类： | DRAM |
| 英文描述： | 16K 2K x 8 PARALLEL EEPROM with SOFTWARE DATA PROTECTION |
| 中文描述： | 16K的2K × 8的并行EEPROM，带有软件数据保护 |
| 文件页数： | 2/17页 |
| 文件大小： | 165K |
| 代理商： | M28C17-120P6T |
A1
A0
DQ0
DQ1
DQ2
VSS
A7
A6
A5
A4
A3
A2
NC
A8
A9
NC
G
A10
E
DQ7
DQ6
W
DQ5
DQ4
DQ3
NC
RB
VCC
AI01506B
M28C17
8
9
10
11
12
13
14
1
2
3
4
5
6
7
16
15
28
27
26
25
24
23
22
21
20
19
18
17
Figure 2A. DIP Pin Connections
AI01508C
N
A8
A9
NC
NC
G
A10
E
D
17
A0
NC
DQ0
D
D
D
D
A6
A5
A4
A3
A2
A1
9
W
1
R
DQ6
A
DQ7
32
D
V
M28C17
N
D
25
V
Figure 2B. LCC Pin Connections
Warning:
NC = Not Connected.
DQ0
DQ1
DQ2
VSS
A3
A2
A1
A0
A10
E
DQ7
DQ6
NC
A8
G
DQ5
DQ4
DQ3
VCC
W
A9
NC
A4
RB
NC
A7
A6
A5
AI01507B
M28C17
8
9
10
11
12
13
14
2
3
4
5
6
7
22
21
20
19
18
17
16
15
28
27
26
25
24
23
1
Figure 2C. SO Pin Connections
Warning:
NC = Not Connected, DU = Don’t Use.
Warning:
NC = Not Connected.
and software handshaking with Ready/Busy, Data
Polling and Toggle Bit. The M28C17 supports 64
byte page write operation. A Software Data Protec-
tion (SDP) is also possible using the standard
JEDEC algorithm.
PIN DESCRIPTION
Addresses (A0-A10).
The address inputs select
an 8-bit memory location during a read or write
operation.
Chip Enable (E).
The chip enable input must be
low to enable all read/write operations. When Chip
Enable is high, power consumption is reduced.
Output Enable (G).
The Output Enable input con-
trols the data output buffers and is used to initiate
read operations.
Data In/ Out (DQ0 - DQ7).
Data is written to or read
from the M28C17 through the I/O pins.
Write Enable (W).
The Write Enable input controls
the writing of data to the M28C17.
Ready/Busy (RB).
Ready/Busy is an open drain
output that can be used to detect the end of the
internal write cycle.
DESCRIPTION
(cont’d)
2/17
M28C17
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| M28C17-120WK1TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:16 Kbit 2K x 8 Parallel EEPROM With Software Data Protection |
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