参数资料
型号: M28F101-90XP6
厂商: 意法半导体
英文描述: 1 Mb 128K x 8, Chip Erase FLASH MEMORY
中文描述: 1 MB的128K的× 8,芯片擦除闪存
文件页数: 10/23页
文件大小: 197K
代理商: M28F101-90XP6
AI00673
tWHGL
tVPHEL
00000h-00001h
tELQV
tEHQZ
tAVQV
A0-A16
E
G
DQ0-DQ7
DATA OUT
COMMAND
VPP
W
tAXQX
tGHQZ
tGLQV
READ
MANUFACTURER
OR DEVICE
READ
ELECTRONIC
SIGNATURE SET-UP
tWLWH
tWHDX
tDVWH
tGHWL
tELWL
tWHEH
Figure7. Electronic SignatureCommand Waveforms
As the Erasealgorithmflow chart shows,whenthe
data read during Erase Verify is not FFh, another
Erase operationis performedand verification con-
tinuesfromthe addressofthelastverifiedbyte.The
command is terminated by writing another valid
command to the command register (for example
Program or Reset).
Program and Program Verify Modes.
The Pro-
gramModeisset-upbywriting40htothecommand
register. This is followed by a second write cycle
which latches the address and data of the byte to
be programmed.The rising edge of W during this
secind cycle starts the programming operation.
ProgrammingisfollowedbyaProgramVerifyofthe
datawritten.
ProgramVerify Modeis set-up bywriting C0h tothe
command register. The rising edgeof W duringthe
set-up of the ProgramVerify Mode stops the Pro-
gramming operation. The following read cycle, of
the address already latched during programming,
is made with an internally generated margin volt-
ageapplied,readingvaliddataindicatesthatallbits
havebeen programmed.
ResetMode.
Thiscommandis usedto safelyabort
Erase or Program Modes. The Reset Mode is
set-up and performed by writing FFh two times to
the command register. The command should be
followed by writing a valid command to the the
command register (for exampleRead).
READ/WRITE MODES
(cont’d)
10/23
M28F101
相关PDF资料
PDF描述
M28F101-90XP3 Quadruple 2-Line to 1-Line Data Selectors/Multiplexers With 3-State Outputs 16-PDIP 0 to 70
M28F101-90XN6 1 Mb 128K x 8, Chip Erase FLASH MEMORY
M28F101-90K3 1 Mb 128K x 8, Chip Erase FLASH MEMORY
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相关代理商/技术参数
参数描述
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