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参数资料
| 型号： | M28LV64-200XMS6 |
| 厂商： | 意法半导体 |
| 元件分类： | EEPROM |
| 英文描述： | 64K 8K x 8 LOW VOLTAGE PARALLEL EEPROM with SOFTWARE DATA PROTECTION |
| 中文描述： | 64K的8K的× 8低电压并联EEPROM，带有软件数据保护 |
| 文件页数： | 7/18页 |
| 文件大小： | 127K |
| 代理商： | M28LV64-200XMS6 |
Symbol
Parameter
Test Condition
Min
Max
Unit
C
IN
Input Capacitance
V
IN
= 0V
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
12
pF
Note:
1. Sampled only, not 100% tested.
Table 4. Capacitance
(1)
(T
A
= 25
°
C, f = 1 MHz )
Symbol
Parameter
TestCondition
Min
Max
Unit
I
LI
Input Leakage Current
0V
≤
V
IN
≤
V
CC
1019
μ
A
I
LO
Output Leakage Current
0V
≤
V
IN
≤
V
CC
10
μ
A
I
CC(1)
Supply Current
(CMOS inputs)
E = V
IL
, G = V
IL
, f= 5 MHz, V
CC
= 3.3V
8
mA
E = V
IL
, G = V
IL
, f= 5 MHz, V
CC
= 3.6V
10
mA
I
CC2(1)
Supply Current (Standby)
CMOS
E > V
CC
–0.3V
20
μ
A
V
IL
Input Low Voltage
– 0.3
0.6
V
V
IH
Input High Voltage
2
V
CC
+0.5
V
V
OL
Output Low Voltage
I
OL
= 1 mA
0.2 V
CC
V
V
OH
Output High Voltage
I
OH
= 1mA
0.8 V
CC
V
Note:
1. All I/O’s open circuit.
Table 5. Read Mode DC Characteristics
(T
A
= 0 to70
°
C or –40 to 85
°
C; V
CC
= 2.7V to 3.6V)
Symbol
Parameter
Min
Max
Unit
t
PUR
Time Delay to Read Operation
1
μ
s
t
PUW
Time Delay to Write Operation (once V
CC
≥
4.5V
)
15
ms
V
WI
Write Inhibit Threshold
1.5
2.5
V
Note:
1. Sampled only, not 100% tested.
Table 6. Power Up Timing
(1)
(T
A
= 0 to 70
°
C or –40 to 85
°
C; V
CC
= 2.7V to 3.6V)
Input Rise and Fall Times
Input Pulse Voltages
Input and Output Timing Ref. Voltages
≤
20ns
0V to V
CC
-0.3V
1.5V
AC MEASUREMENT CONDITIONS
Note that Output Hi-Z is defined as the point where data
is no longer driven.
AI01274
VCC–0.3V
0V
0.5 VCC
Figure7. ACTesting Input Output Waveforms
AI01396
VCC
OUT
CL= 100pF
CLincludes JIG capacitance
1.8k
DEVICE
UNDER
TEST
1.3k
Figure 8. AC Testing Equivalent Load Circuit
7/18
M28LV64
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